diff options
Diffstat (limited to 'drivers/gpu/drm/msm/dp/dp_reg.h')
| -rw-r--r-- | drivers/gpu/drm/msm/dp/dp_reg.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dp/dp_reg.h b/drivers/gpu/drm/msm/dp/dp_reg.h index 3835c7f5cb98..7c44d4e2cf13 100644 --- a/drivers/gpu/drm/msm/dp/dp_reg.h +++ b/drivers/gpu/drm/msm/dp/dp_reg.h @@ -11,6 +11,8 @@ /* DP_TX Registers */ #define REG_DP_HW_VERSION (0x00000000) +#define DP_HW_VERSION_1_0 0x10000000 +#define DP_HW_VERSION_1_2 0x10020000 #define REG_DP_SW_RESET (0x00000010) #define DP_SW_RESET (0x00000001) @@ -21,8 +23,25 @@ #define REG_DP_CLK_CTRL (0x00000018) #define REG_DP_CLK_ACTIVE (0x0000001C) + #define REG_DP_INTR_STATUS (0x00000020) +#define DP_INTR_HPD BIT(0) +#define DP_INTR_AUX_XFER_DONE BIT(3) +#define DP_INTR_WRONG_ADDR BIT(6) +#define DP_INTR_TIMEOUT BIT(9) +#define DP_INTR_NACK_DEFER BIT(12) +#define DP_INTR_WRONG_DATA_CNT BIT(15) +#define DP_INTR_I2C_NACK BIT(18) +#define DP_INTR_I2C_DEFER BIT(21) +#define DP_INTR_PLL_UNLOCKED BIT(24) +#define DP_INTR_AUX_ERROR BIT(27) + #define REG_DP_INTR_STATUS2 (0x00000024) +#define DP_INTR_READY_FOR_VIDEO BIT(0) +#define DP_INTR_IDLE_PATTERN_SENT BIT(3) +#define DP_INTR_FRAME_END BIT(6) +#define DP_INTR_CRC_UPDATED BIT(9) + #define REG_DP_INTR_STATUS3 (0x00000028) #define REG_DP_INTR_STATUS4 (0x0000002C) |