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2025-07-07arm64: dts: allwinner: a523: Move rgmii0 pins to correct locationChen-Yu Tsai
Nodes are supposed to be sorted by address, or if no addresses apply, by node name. The rgmii0 pins are out of order, possibly due to multiple patches adding pin mux settings conflicting. Move the rgmii0 pins to the correct location. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250628161608.3072968-4-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-07arm64: dts: allwinner: a523: Move mmc nodes to correct positionChen-Yu Tsai
When the mmc nodes were added to the dtsi file, they were inserted in the incorrect position. Move them to the correct place. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250628161608.3072968-3-wens@kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-07-05arm64: dts: exynos7870-j6lte: reduce memory ranges to base amountKaustabh Chakraborty
The device is available in multiple variants with differing RAM capacities. The memory range defined in the 0x80000000 bank exceeds the address range of the memory controller, which eventually leads to ARM SError crashes. Reduce the bank size to a value which is available to all devices. The bootloader must be responsible for identifying the RAM capacity and editing the memory node accordingly. Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870") Cc: stable@vger.kernel.org # v6.16 Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-3-349987874d9a@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-07-05arm64: dts: exynos7870-on7xelte: reduce memory ranges to base amountKaustabh Chakraborty
The device is available in multiple variants with differing RAM capacities. The memory range defined in the 0x80000000 bank exceeds the address range of the memory controller, which eventually leads to ARM SError crashes. Reduce the bank size to a value which is available to all devices. The bootloader must be responsible for identifying the RAM capacity and editing the memory node accordingly. Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870") Cc: stable@vger.kernel.org # v6.16 Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-2-349987874d9a@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-07-05arm64: dts: exynos7870: add quirk to disable USB2 LPM in gadget modeKaustabh Chakraborty
In gadget mode, USB connections are sluggish. The device won't send packets to the host unless the host sends packets to the device. For instance, SSH-ing through the USB network would apparently not work unless you're flood-pinging the device's IP. Add the property snps,usb2-gadget-lpm-disable to the dwc3 node, which seems to solve this issue. Fixes: d6f3a7f91fdb ("arm64: dts: exynos: add initial devicetree support for exynos7870") Cc: stable@vger.kernel.org # v6.16 Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250626-exynos7870-dts-fixes-v1-1-349987874d9a@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-07-04arm64: dts: amlogic: Enable the npu node for Alta and VIM3Tomeu Vizoso
We now have support in Mesa and everything is ready in distros such as Debian. Signed-off-by: Tomeu Vizoso <tomeu@tomeuvizoso.net> Link: https://lore.kernel.org/r/20250522092940.3293889-1-tomeu@tomeuvizoso.net Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04dts: arm64: amlogic: add S6 pinctrl nodeXianwei Zhao
Add pinctrl device to support Amlogic S6. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250527-s6-s7-pinctrl-v3-6-44f6a0451519@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04dts: arm64: amlogic: add S7D pinctrl nodeXianwei Zhao
Add pinctrl device to support Amlogic S7D. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250527-s6-s7-pinctrl-v3-5-44f6a0451519@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04dts: arm64: amlogic: add S7 pinctrl nodeXianwei Zhao
Add pinctrl device to support Amlogic S7. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250527-s6-s7-pinctrl-v3-4-44f6a0451519@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04arm64: dts: amlogic: Add Ugoos AM3J. Neuschäfer
The Ugoos AM3 is a small set-top box based on the Amlogic S912 SoC, with a board design that is very close to the Q20x development boards. The MMC max-frequency properties are copied from the downstream device tree. https://ugoos.com/ugoos-am3-16g The following functionality has been tested and is known to work: - debug serial port - "update" button inside the case - USB host mode, on all three ports - HDMI video/audio output - eMMC, MicroSD, and SDIO WLAN - S/PDIF audio output - Ethernet - Infrared remote control input The following functionality doesn't seem to work: - USB role switching and device mode on the "OTG" port - case LED Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250613-ugoos-am3-v3-2-f8a43e6bbfdb@posteo.net Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04arm64: dts: amlogic: Align wifi node name with bindingsKrzysztof Kozlowski
Since commit 3c3606793f7e ("dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schema"), bindings expect 'wifi' as node name: meson-gxm-rbox-pro.dtb: brcmf@1: $nodename:0: 'brcmf@1' does not match '^wifi(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250424084721.105113-1-krzysztof.kozlowski@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-07-04arm64: dts: st: add timer nodes on stm32mp257f-ev1Fabrice Gasnier
Configure timer nodes on stm32mp257f-ev1: - Timer3 CH2 is available on mikroBUS connector for PWM - timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available on EXPANSION connector. Timers are kept disabled by default, so the pins can be used for any other purpose (and the timers can be assigned to any of the processors). Arbitrary choice is to use all these timers as PWM (or counter on internal clock signal), except for timer10 that is configured with CH1 as an input (for capture). Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20250110091922.980627-9-fabrice.gasnier@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04arm64: dts: st: add timer pins for stm32mp257f-ev1Fabrice Gasnier
Add timer pins available on stm32mp257f-ev1, configured for PWM: - timer3 CH2 is available on mikroBUS connector - timer8 CH1, timer8 CH4, timer10 CH1 and timer12 CH2 are available on EXPANSION connector Arbitrary define all these pins to be used as PWM (output) channels, except for timer10 CH1, to be used as counter input. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20250110091922.980627-8-fabrice.gasnier@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04arm64: dts: st: add timer nodes on stm32mp251Fabrice Gasnier
Add timers support on STM32MP25 SoC. Use dedicated compatible to handle new features and instances introduced with this SoC. STM32MP25 SoC has various timer flavours, each group has its own specific feature list: - Advanced-control timers (TIM1/TIM8/TIM20) - General-purpose timers (TIM2/TIM3/TIM4/TIM5) - Basic timers (TIM6/TIM7) - General-purpose timers (TIM10/TIM11/TIM12/TIM13/TIM14) - General purpose timers (TIM15/TIM16/TIM17) Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20250110091922.980627-7-fabrice.gasnier@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04arm64: dts: ti: k3-am62p-verdin: add SD_1 CD pull-upFrancesco Dolcini
Add internal pull-up to the SD_1 card detect signal, without this the CD signal is floating and spurious detects events can happen. Fixes: 87f95ea316ac ("arm64: dts: ti: Add Toradex Verdin AM62P") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://lore.kernel.org/r/20250701081643.71406-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-03arm64: dts: qcom: sm8150: Drop unrelated clocks from PCIe hostsKonrad Dybcio
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250521-topic-8150_pcie_drop_clocks-v1-4-3d42e84f6453@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-03arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hostsKonrad Dybcio
The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250521-topic-8150_pcie_drop_clocks-v1-3-3d42e84f6453@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-07-03Merge tag 'arm-soc/for-6.17/devicetree-arm64' of ↵Arnd Bergmann
https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM64-based SoCs Device Tree updates for 6.17, please pull the following: - Linus updates the 64-bit BCMBCA SoCs Device Tree with the common peripherals that exit as well as correct IRQ assignments - Andrea adds support for the RP1 companion chip on the Raspberry Pi 5 systems with clocks, gpios, pinctrl, all of that using an overlay to describe those peripherals - Rob drops the interrupt-parent property from the GICv2M node on Northstar2 SoCs * tag 'arm-soc/for-6.17/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: northstar2: Drop GIC V2M "interrupt-parent" arm64: dts: broadcom: Add overlay for RP1 device arm64: dts: broadcom: Add board DTS for Rpi5 which includes RP1 node arm64: dts: bcm2712: Add external clock for RP1 chipset on Rpi5 arm64: dts: rp1: Add support for RaspberryPi's RP1 device dt-bindings: misc: Add device specific bindings for RaspberryPi RP1 dt-bindings: pinctrl: Add RaspberryPi RP1 gpio/pinctrl/pinmux bindings dt-bindings: clock: Add RaspberryPi RP1 clock bindings ARM64: dts: bcm63158: Add BCMBCA peripherals ARM64: dts: bcm6858: Add BCMBCA peripherals ARM64: dts: bcm6856: Add BCMBCA peripherals ARM64: dts: bcm4908: Add BCMBCA peripherals Link: https://lore.kernel.org/r/20250630190216.1518354-3-florian.fainelli@broadcom.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-03Merge tag 'renesas-dts-for-v6.17-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.17 - Add SPI FLASH, camera, and Ethernet support on the RZ/G3E SoC and/or the RZ/G3E SoM and SMARC Carrier-II EVK development board, - Add Ethernet, USB2, and PMIC support on the RZ/V2H and RZ/V2N SoCs and EVK boards, - Add timer, I2C, watchdog, and GPU support on the RZ/V2N SoC and the RZ/V2N EVK board, - Add debug LED support for the RZN1D-DB development board, - Improve PCIe clock description on the Retronix Sparrow Hawk board, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.17-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits) arm64: dts: renesas: r9a09g047: Add GBETH nodes arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Rename fixed regulator node names arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add RAA215300 PMIC arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add RAA215300 PMIC arm64: dts: renesas: rcar-gen3: Add bootph-all to sysinfo EEPROMs arm64: dts: renesas: sparrow-hawk: Describe split PCIe clock arm64: dts: renesas: r8a779g0: Describe PCIe root ports arm64: dts: renesas: ebisu: Add CAN0 support ARM: dts: renesas: r9a06g032: Add second clock input to RTC arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Enable USB2.0 support arm64: dts: renesas: r9a09g056: Add USB2.0 support arm64: dts: renesas: r8a779g3-sparrow-hawk: Sort DTS ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe debug LEDs arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable USB2.0 support PCI/pwrctrl: Add optional slot clock for PCI slots arm64: dts: renesas: r9a09g057: Add USB2.0 support arm64: dts: renesas: r9a09g047e57-smarc: Enable CRU, CSI support arm64: dts: renesas: renesas-smarc2: Enable I2C0 node arm64: dts: renesas: r9a09g047e57-smarc: Add I2C0 pincontrol arm64: dts: renesas: r9a09g047: Add CRU, CSI2 nodes ... Link: https://lore.kernel.org/r/cover.1751026664.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-03arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"Rob Herring (Arm)
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The Thunder2 SoC is missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-03arm64: dts: lg: Add missing PL011 "uartclk"Rob Herring (Arm)
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The LG131x SoCs are missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Chanho Min <chanho.min@lge.com> Link: https://lore.kernel.org/r/20250609-dt-lg-fixes-v1-2-e210e797c2d7@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-03arm64: dts: lg: Refactor common LG1312 and LG1313 partsRob Herring (Arm)
The LG1312 and LG1313 DT are almost identical with the exception of the ethernet node. Refactor the common parts into a separate .dtsi file and include it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Chanho Min <chanho.min@lge.com> Link: https://lore.kernel.org/r/20250609-dt-lg-fixes-v1-1-e210e797c2d7@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-02arm64: dts: renesas: Add CN15 eMMC and SD overlays for RZ/V2H and RZ/V2N EVKsLad Prabhakar
Introduce device tree overlays for supporting the eMMC (RTK0EF0186B02000BJ) and microSD (RTK0EF0186B01000BJ) sub-boards connected via the CN15 connector on the RZ/V2H and RZ/V2N evaluation kits. These overlays enable SDHI0 with appropriate pin control settings, power regulators, and GPIO handling. Both sub-boards are supported using shared overlay files that can be applied to either EVK due to their identical connector layout and interface support. To support this, new DT overlay files are added: - `rzv2-evk-cn15-emmc.dtso` for eMMC - `rzv2-evk-cn15-sd.dtso` for microSD Additionally, the base DTS files for both EVKs are updated to include a fixed 1.8V regulator (`reg_1p8v`) needed by the eMMC sub-board and potential future use cases such as HDMI output. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250627193742.110818-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-07-02arm64: dts: renesas: r8a779h2: Add Gray Hawk Single supportGeert Uytterhoeven
The Gray Hawk Single board with R-Car V4M-7 (R8A779H2) uses an updated version of the R-Car V4M (R8A779H0) SoC. For now, there are no visible differences compared to the variant equipped with an R-Car V4M (R8A779H0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/d2e0e7b746063368b83148100aa553cff55b8b60.1750931027.git.geert+renesas@glider.be
2025-07-02arm64: dts: renesas: Add Renesas R8A779H2 SoC supportTam Nguyen
Add support for the Renesas R-Car V4M-7 (R8A779H2) SoC, which is an updated version of the R-Car V4M (R8A779H0) SoC. Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/294ca4211c5a73942dc2ca04ae6d3c384d534f2b.1750931027.git.geert+renesas@glider.be
2025-07-02arm64: dts: renesas: Factor out Gray Hawk Single board supportGeert Uytterhoeven
Move the common parts for the Renesas Gray Hawk Single board to gray-hawk-single.dtsi, to enable future reuse. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/a3e89836fde8073ac320734cec67f89ddfa8879a.1750931027.git.geert+renesas@glider.be
2025-07-01arm64: dts: imx93-11x11-evk: remove the duplicated pinctrl_lpi2c3 nodeJoy Zou
Remove the duplicated pinctrl_lpi2c3 node. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-11x11-evk: reduce the driving strength of net RXC/TXCClark Wang
Reduce the driving strength of all Ethernet RGMII R/TXC pads according to hardware signal measurement result. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-11x11-evk: disable all realtek ethernet phy CLKOUTClark Wang
The realtek phy CLKOUT signal is not used. Disable it to save power. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-qsb/evk: add usdhc3 and lpuart5Frank Li
Add usdhc3 and lpuart5 for imx93-9x9-qsb, imx93-11x11-evk and imx93-14x14-evk, which connect to onboard wifi/bt module. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93: remove eee-broken-1000t for eqos nodeClark Wang
The "eee-broken-1000t" was added on 8mm for FEC to avoid issue of ptp sync. EQoS haven't such issue. So, remove this for EQoS phys. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx93-9x9-qsb: add IMU sensor supportHaibo Chen
The i.MX93 9x9 qsb has a ST LSM6DSO connected to I2C, which a is 6-axis IMU (inertial measurement unit = accelerometer & gyroscope). So add the missing parts to the DTS file. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx8mp-var-som: Add EQoS support with MaxLinear PHYStefano Radaelli
Enable the EQoS Ethernet controller on the i.MX8MP VAR-SOM with the integrated Maxlinear MXL86110 PHY. The PHY is connected to the EQOS MDIO bus at address 4. This patch adds: - EQOS controller configuration with RGMII interface. - Proper reset timings. - PHY power supply regulators. - RGMII pinmux configuration for all data, control and clock signals. - LED configuration for link status indication via the LED subsystem under /sys/class/leds/, leveraging the support implemented in the. mxl86110 PHY driver (drivers/net/phy/mxl-86110.c). Two LEDs are defined to match the LED configuration on the Variscite VAR-SOM Carrier Boards: * LED@0: Yellow, netdev trigger. * LED@1: Green, netdev trigger. The RGMII TX/RX delays are implemented in SOM via PCB passive delays, so no software delay configuration is required. Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx8qm: add system controller watchdog supportThomas Richard
Add system controller watchdog support for i.MX8QM. Acked-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95: Correct the DMA interrupter number of pcie0_epRichard Zhu
Correct the DMA interrupter number of pcie0_ep from 317 to 311. Fixes: 3b1d5deb29ff ("arm64: dts: imx95: add pcie[0,1] and pcie-ep[0,1] support") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: add GPIO reset for ethphy0Wei Fang
Add GPIO reset for ethphy0. Signed-off-by: Wei Fang <wei.fang@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: adjust pinctrl settings for usdhc2Luke Wang
The driver strength is too high for SDR104 mode. Change the driver strength to x3 according to hardware recommendation. Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-evk: add USB3 PHY tuning propertiesXu Yang
Add USB3 PHY tuning properties for imx95-15x15-evk and imx95-19x19-evk boards according to signal measurement results. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx95-19x19-evk: add adc0 flexcan[1,2] i2c[2,3] uart5 spi3 and tpm3Frank Li
Add adc0 flexcan[1,2] i2c[2,3] uart5 spi3 tpm3 netc_timer and related phys regulators pinmux and related child nodes. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-var-som: update eqos support for MaxLinear PHYStefano Radaelli
Variscite has updated the Ethernet PHY on the VAR-SOM-MX93 from the ADIN1300BCPZ to the MaxLinear MXL86110, as documented in the August 2023 revision changelog. Link: https://variwiki.com/index.php?title=VAR-SOM-MX93_rev_changelog Update the device tree accordingly: - Drop the regulator node used to power the previously PHY. - Add support for the reset line using GPIO1_IO07 with proper timings. - Configure the PHY LEDs via the LED subsystem under /sys/class/leds/, leveraging the support implemented in the mxl86110 PHY driver (drivers/net/phy/mxl-86110.c). Two LEDs are defined to match the LED configuration on the Variscite VAR-SOM Carrier Boards: * LED@0: Yellow, netdev trigger. * LED@1: Green, netdev trigger. - Adjust the RGMII clock pad control settings to match the updated PHY requirements. These changes ensure proper PHY initialization and LED status indication for the new MaxLinear MXL86110, improving board compatibility with the latest hardware revision. Signed-off-by: Stefano Radaelli <stefano.radaelli21@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpioTim Harvey
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the W_DISABLE2# pin of the M.2 socket. Update the gpio name for consistency. Fixes: 6a5d95b06d93 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-tqma9352: add memory nodeMarkus Niebel
Although the bootloader should fixup with real memory size, add memory node here with smallest assembled size for readability. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-01arm64: dts: freescale: imx93-phyboard-nash: Move ADC vref to SoMPrimoz Fiser
Move configuration for ADC voltage reference from board DTS to a SoM include file. The SoC ADC reference voltage is connected to a "VDDA_1V8" voltage node and supplied by the PMIC's BUCK5 regulator. The reference voltage is thus defined by the SoM and cannot be changed by the carrier board design and as such belongs into the SoM include file. Moreover, with this in place, customers designing own carrier boards can simply include imx93-phycore-som.dtsi and enable adc1 in their own DTS without the need to define dummy ADC vref regulator themselves anymore. Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-30arm64: dts: rockchip: Enable eMMC HS200 mode on Radxa E20CJonas Karlman
eMMC HS200 mode (1.8V I/O) is supported by the MMC host controller on RK3528 and works with the optional on-board eMMC module on Radxa E20C. Be explicit about HS200 support in the device tree for Radxa E20C. Fixes: 3a01b5f14a8a ("arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20250621165832.2226160-1-jonas@kwiboo.se Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add bluetooth support to ArmSoM Sige7Jianfeng Liu
ArmSoM Sige7 has onboard AP6275P Wi-Fi6 (PCIe) and BT5 (UART) module which is similar with Khadas Edge2. This commit enables bluetooth at uart6. Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Link: https://lore.kernel.org/r/20250621135319.61766-1-liujianfeng1994@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: enable PCIe on ROCK 4DNicolas Frattaroli
The RADXA ROCK 4D board has a PCIe controller connected to a flat flex connector, compatible with the one the RPi5 uses. Enable the associated combphy and pcie controller node, as well as add the remaining pinctrl definition for the reset. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250621-rk3576-rock4d-pcie-v1-1-2b33c9f12955@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Enable HDMI receiver on CM3588Valentin Hăloiu
Enable support for the HDMI input port found on FriendlyElec CM3588 and CM3588 Plus. Signed-off-by: Valentin Hăloiu <valentin.haloiu@gmail.com> Link: https://lore.kernel.org/r/20250622185814.35031-1-valentin.haloiu@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add HDMI PHY PLL clock source to VOP2 on rk3576Cristian Ciocaltea
Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS char rate via phy_configure_opts_hdmi"), the workaround of passing the rate from DW HDMI QP bridge driver via phy_set_bus_width() became partially broken, as it cannot reliably handle mode switches anymore. Attempting to fix this up at PHY level would not only introduce additional hacks, but it would also fail to adequately resolve the display issues that are a consequence of the system CRU limitations. Instead, proceed with the solution already implemented for RK3588: make use of the HDMI PHY PLL as a better suited DCLK source for VOP2. This will not only address the aforementioned problem, but it should also facilitate the proper operation of display modes up to 4K@60Hz. It's worth noting that anything above 4K@30Hz still requires high TMDS clock ratio and scrambling support, which hasn't been mainlined yet. Fixes: d74b842cab08 ("arm64: dts: rockchip: Add vop for rk3576") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-By: Detlev Casanova <detlev.casanova@collabora.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-3-4b11007d8675@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Enable HDMI PHY clk provider on rk3576Cristian Ciocaltea
As with the RK3588 SoC, the HDMI PHY PLL on RK3576 can be used as a more accurate pixel clock source for VOP2, which is actually mandatory to ensure proper support for display modes handling. Add the missing #clock-cells property to allow using the clock provider functionality of HDMI PHY. Fixes: ad0ea230ab2a ("arm64: dts: rockchip: Add hdmi for rk3576") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-2-4b11007d8675@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-06-30arm64: dts: rockchip: Add missing fan-supply to rk3566-quartz64-aDiederik de Haas
The Quartz 64 Model-A Schematic from 20210427 on page 7 shows that the fan's power supply is provided by VCC12V_DCIN. This fixes the following warning: gpio-fan gpio_fan: supply fan not found, using dummy regulator Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250628142843.839150-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
generated by cgit (git 2.34.1) at 2025-09-19 16:48:58 +0000