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2012-05-03ARM: dt: tegra trimslice: add RTC I2C deviceStephen Warren
According to the device's datasheet, it can support an interrupt too. However, the existing board file doesn't specify an interrupt, and I don't have the schematics, so I can't add an interrupts property. The current Linux driver doesn't support anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-03ARM: dt: tegra seaboard: add i2c devicesOlof Johansson
Add the known i2c devices on seaboard to the i2c table. Also rename the temperature sensor device node, and mark it as a nct1008 instead of an adt7461 (which it is -- the chips are compatible though). Signed-off-by: Olof Johansson <olof@lixom.net> [swarren: Removed isl29018 from patch; it's already there now. Fixed interrupts properties now that Tegra GPIO is an interrupt controller. Moved smart-battery to the correct I2C bus.] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-03ARM: dt: tegra seaboard: configure I2C2 pinmuxStephen Warren
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard actually uses this as an I2C bus mux, and devices are connected to both pingroups. This change statically assigns the I2C2 controller to pingroup PTA, so that on-board devices can be accessed. The DDC pingroup is used for EDID/DDC accesses which are not yet required, given the absence of any Tegra graphics support. I2C muxing will be supported later. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-03ARM: dt: tegra seaboard: fix I2C2 SCL rateStephen Warren
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices. This requires a 100KHz SCL (clock) rate. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-03ARM: dt: tegra: enable als and proximity sensorLaxman Dewangan
Add the device info for ALS and proximity sensor for tegra boards cardhu, ventana and seaboard. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-03ARM: OMAP3: cpuidle - set global variables staticDaniel Lezcano
struct powerdomain varialbes are all file local, make them static. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [khilman@ti.com: update changelog, drop error check in fast path] Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: set omap3_idle_data as staticDaniel Lezcano
Reduce the scope of the omap3_idle_data to the file as it is only used in cpuidle34xx.c. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - simplify next_valid_stateDaniel Lezcano
Simplify the indentation by removing the useless 'else' statement. Remove the first loop for the 'idx' search as we have it already with the 'index' passed as parameter. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - use omap3_idle_data directlyDaniel Lezcano
We are storing the 'omap3_idle_data' in the private data field of the cpuidle device. As we are using this variable only in this file, that does not really make sense. Let's use the global variable directly. As the table is initialized statically, let's remove the initialization at startup too. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: define statically the omap3_idle_dataDaniel Lezcano
Initialize the omap3_idle_data array at compile time, that will allow to remove the initialization at boot time. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - remove cpuidle_params_tableDaniel Lezcano
We do not longer need the ''cpuidle_params_table' array as we defined the states in the driver and we checked they are all valid. We also remove the structure definition as it is no longer used. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - remove the 'valid' fieldDaniel Lezcano
With the previous changes all the states are valid, except the last state which is now handled at runtime by next_valid_state() based on the errata flags. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> [khilman@ti.com: minor changelog rework] Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - remove errata check in the init functionDaniel Lezcano
The errata check is done in the next_valid_state function, no need to check that in the omap3_idle_init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: define cpuidle staticallyDaniel Lezcano
Use the new cpuidle API and define in the driver the states. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters tableDaniel Lezcano
As suggested, this table is an optimized version for rx51 and we remove it in order to consolidate the cpuidle code between omap3 and omap4, we remove this specific data definition which is used to override the default omap3 latencies but at the cost of extra code and complexity. In order to not lose the values which probably took time to be measured, the table is converted into a comment with an array description. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - remove omap4_idle_data initialization at boot timeDaniel Lezcano
We initialized it at compile time, no need to do that at boot time. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - use the omap4_idle_data variable directlyDaniel Lezcano
We are storing the 'omap4_idle_data' in the private data field of the cpuidle device. As we are using this variable only in this file, that does not really make sense. Let's use the global variable directly. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - Initialize omap4_idle_data at compile timeDaniel Lezcano
We initialize the omap4_idle_data variable at compile time allowing us to remove in the next patch the initialization done at boot time. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - fix static omap4_idle_data declarationDaniel Lezcano
Add the static declaration for the omap4_idle_data variable because its scope is in the file only. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - Remove the cpuidle_params_table tableDaniel Lezcano
We do not longer need this table as we defined the values in the driver states. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - Declare the states with the driver declarationDaniel Lezcano
The cpuidle API allows to declare statically the states in the driver structure. Let's use it. We do no longer need the fill_cstate function called at runtime and by the way adding more instructions at boot time. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: OMAP4: cpuidle - Remove unused valid fieldDaniel Lezcano
The 'valid' field is never used in the code, let's remove it. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
2012-05-03ARM: provide a late_initcall hook for platform initializationShawn Guo
This allows platforms to set up things that need to be done at late_initcall time. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Robert Lee <rob.lee@linaro.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-03ARM: mmp: add usb host support for PXA168Neil Zhang
The ehci-mv can support PXA168, PXA910 and PXA920, use this driver to support pxa168 SPH usb. Signed-off-by: Neil Zhang <zhangwm@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-03ARM: mmp: add usb device support for ttc dkbNeil Zhang
There is an U2O OTG controller on ttc dkb, this patch is going to enable it. At this moment, it can only works in device mode, because when works in host mode, it needs to supply vbus, but we have no vbus driver added at this moment. Once the vbus driver is added, I'll prepar another patch to enable the switch function. Signed-off-by: Neil Zhang <zhangwm@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-03ARM: mmp: add usb device support for PXA910Neil Zhang
Add usb device support for Marvell PXA910. Actually PXA920 will use the same device. Signed-off-by: Neil Zhang <zhangwm@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-03ARM: pxa: hx4700: Add PCMCIA/CF supportPaul Parsons
This patch is part of a set which adds PCMCIA/CF support for the hx4700. This patch modifies asic3_gpio_config[] as follows: 1. Remove ASIC3_GPIOC4_CF_nCD, whose purpose is unknown. 2. Add ASIC3_GPIOD4_CF_nCD, the actual CF card detect GPIO. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-03ARM: pxa: hx4700: Enable ASIC3 GPIO as a wakeup sourcePaul Parsons
This patch enables the ASIC3 GPIO (12) as a wakeup source: 1. Set the WAKEUP_ON_EDGE_RISE MFP config bits for GPIO12 in hx4700_pin_config[]. 2. Call gpio_set_wake() for GPIO12. With GPIO12 thus enabled, the mfd/asic3 driver can enable its own GPIOs as wakeup sources by implementing a irq_set_wake() handler. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-03ARM: pxa: hx4700: Initialize DS1WM clock_ratePaul Parsons
The asic3 driver now sets the DS1WM clock_rate from the newly added asic3_platform_data clock_rate field. This patch initializes the asic3_platform_data clock_rate field on the hx4700 platform. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Cc: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-05-02ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for ARCH_TEGRAStephen Warren
Tegra doesn't yet support system sleep. Explicitly disable support for this feature in Kconfig. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-02Merge branch 'ux500-u9540-for-arm-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/newsoc From: Linus Walleij <linus.walleij@linaro.org>: Core support for the U9540 after finalized review * 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits) ARM: ux500: ioremap differences for DB9540 ARM: ux500: core U9540 support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-02Merge branch 'ux500-del-u5500-for-arm-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup Linus Walleij <linus.walleij@linaro.org> writes: Delete U5500 after obsoletion of this ASIC, including two patches to the MFD subsystem that have been ACK:ed by Samuel Ortiz. * 'ux500-del-u5500-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: mfd/ab5500: delete AB5500 support mfd/db5500-prcmu: delete DB5500 PRCMU support ARM: ux500: delete U5500 support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-02Merge tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Arnd Bergmann
next/cleanup From: Sascha Hauer <s.hauer@pengutronix.de> ARM: i.MX cleanups for 3.5 * tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6: (5 commits) ARM: mx53: fix pad definitions for MX53_PAD_EIM_D28__I2C1_SDA and MX53_PAD_GPIO_8__CAN1_RXCAN ARM: imx/eukrea_mbimx27-baseboard: fix typo in error message ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some pads arm: imx: add missing select IMX_HAVE_PLATFORM for MACH_MX35_3DS in Kconfig arm: imx: make various struct sys_timer static Includes an update to 3.4-rc4 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-02ARM: 7408/1: cacheflush: return error to userspace when flushing syscall failsWill Deacon
The cacheflush syscall can fail for two reasons: (1) The arguments are invalid (nonsensical address range or no VMA) (2) The region generates a translation fault on a VIPT or PIPT cache This patch allows do_cache_op to return an error code to userspace in the case of the above. The various coherent_user_range implementations are modified to return 0 in the case of VIVT caches or -EFAULT in the case of an abort on v6/v7 cores. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-02ARM: 7409/1: Do not call flush_cache_user_range with mmap_sem heldDima Zavin
We can't be holding the mmap_sem while calling flush_cache_user_range because the flush can fault. If we fault on a user address, the page fault handler will try to take mmap_sem again. Since both places acquire the read lock, most of the time it succeeds. However, if another thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in between the call to flush_cache_user_range and the fault, the down_read in do_page_fault will deadlock. [will: removed drop of vma parameter as already queued by rmk (7365/1)] Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-05-02ARM i.MX31: implement clocks using common clock frameworkSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-05-02ARM i.MX27: implement clocks using common clock frameworkSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-05-02ARM i.MX21: implement clocks using common clock frameworkSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-05-02ARM i.MX1: implement clocks using common clock frameworkSascha Hauer
This also changes the DMA clkdev lookup to use the imx-dma driver name and "ahb" as connection ID to request the hclk dma clock. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-05-02ARM i.MX25: implement clocks using common clock frameworkSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2012-05-02ARM: imx: add common clock support for clk busyShawn Guo
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: imx: add common clock support for pfdShawn Guo
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-02ARM i.MX: Add common clock support for 2bit gateSascha Hauer
This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: imx: add common clock support for pllv3Shawn Guo
This PLL is found on i.MX6 SoCs Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-05-02ARM i.MX: Add common clock support for pllv2Sascha Hauer
This PLL is found on i.MX51 and i.MX53 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM i.MX: Add common clock support for pllv1Sascha Hauer
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: mx53: fix pad definitions for MX53_PAD_EIM_D28__I2C1_SDA and ↵Lothar Waßmann
MX53_PAD_GPIO_8__CAN1_RXCAN MX53_PAD_EIM_D28__I2C1_SDA uses an undefined PAD_CTRL_I2C MX53_PAD_GPIO_8__CAN1_RXCAN has an incorrect input_select value Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: imx/eukrea_mbimx27-baseboard: fix typo in error messageUwe Kleine-König
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some padsAlexander Shiyan
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-05-02ARM: ux500: add the cpuidle driver for WFI and ARM retentionDaniel Lezcano
This patch adds the cpuidle driver for the ux500 SoC. The boards saves 12mA with these states. It is based on the latest cpuidle consolidation from Robert Lee. The cpu can go to retention only if the other core is in WFI. If the other cpu is in WFI and we decoupled the gic from the cores, then we have the guarantee, it won't be wake up. It is up to the prcmu firmware to recouple the gic automatically after the power state mode is selected. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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