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2014-10-30ARM: shmobile: r8a7790: Add MMP clock to device treeYoshifumi Hosoya
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7791: Add SGX clock to device treeKouei Abe
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7790: Add RGX clock to device treeKouei Abe
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7740 dtsi: Fix clock index for scifa2Geert Uytterhoeven
The clocks property for the scifa2 device node referred to the scifa0 clock index instead of the scifa2 clock index. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7790: switch from scif to scifaWolfram Sang
SCIF and SCIFA can be plexed onto the same wires on Lager board. The datasheet also describes the wires as SCIFA. So, to make use of the bigger FIFOs switch to SCIFA instead. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7791: link PCI USB devices to USB PHYSergei Shtylyov
Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7790: link PCI USB devices to USB PHYSergei Shtylyov
Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Based on the original work by Ben Dooks <ben.dooks@codethink.co.uk>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: henninger: enable USB PHYSergei Shtylyov
Enable USB PHY device for the Henninger board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: koelsch: enable USB PHYSergei Shtylyov
Enable USB PHY device for the Koelsch board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7791: add USB PHY DT supportSergei Shtylyov
Define the R8A7791 generic part of the USB PHY device node. It is up to the board file to enable the device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: lager: enable USB PHYSergei Shtylyov
Enable USB PHY device for the Lager board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7790: add USB PHY DT supportSergei Shtylyov
Define the R8A7790 generic part of the USB PHY device node. It is up to the board file to enable the device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: r8a7740 dtsi: Add missing INTCA clock for irqpin moduleGeert Uytterhoeven
This clock drives the INTCA irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: devicetree@vger.kernel.org Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30Merge tag 'renesas-r8a73a4-dt-timers-for-v3.19' into dt-for-v3.19.baseSimon Horman
Renesas ARM Based SoC r8a73a4 DT Timers Updates for v3.19 * Initialise CMT1 timer using DT
2014-10-30ARM: shmobile: marzen-reference: Don't include legacy clock.hLaurent Pinchart
The marzen-reference board file doesn't need the clock.h header, don't include it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: koelsch: Enable DU device in DTLaurent Pinchart
Specify the DU output topology, enable the DU device and configure the related pins. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: koelsch-reference: Remove DU platform deviceLaurent Pinchart
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: lager: Enable DU device in DTLaurent Pinchart
Specify the DU output topology, enable the DU device and configure the related pins. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: lager-reference: Remove DU platform deviceLaurent Pinchart
The DU device is now instantiated from the device tree, remove the corresponding platform device. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-30ARM: shmobile: marzen: Enable DU device in DTLaurent Pinchart
Specify the DU output topology, enable the DU device and configure the related pins. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-29ARM: dts: Fix bootloader version dependencies by muxing n900 smc91x pinsTony Lindgren
Apparently some versions of nolo don't mux the all the necessary GPMC pins for the smc91x probe to work properly. Let's fix this issue by adding mux support for GPMC to the kernel. Note that GPMC clk needs input enabled for OnenNAND to work. Cc: Kevin Hilman <khilman@kernel.org> Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-10-29ARM: OMAP2+: Warn about deprecated legacy booting modeTony Lindgren
We're moving omaps to use device tree based booting and already have omap2, omap4, omap5, am335x and am437x booting in device tree only mode. Only omap3 still has legacy booting still around and we really want to make that device tree only. So let's add a warning about deprecated legacy booting so we get people to upgrade their boards to use device tree based booting and find out about any remaining issues. Note that for most boards we already have the .dts file and those can be booted with without changing the bootloader using the appended DTB mode. Acked-By: Sebastian Reichel <sre@kernel.org> Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-10-29ARM: omap2plus_defconfig: Fix errors with NAND BCHTony Lindgren
Looks like we need to have BCH enabled to get NAND working and to avoid getting: nand: error: CONFIG_MTD_NAND_ECC_BCH not enabled Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-10-29ARM: dts: berlin: Enable eMMC on Sony NSZ-GS7Sebastian Hesselbarth
With SDHCI for BG2, we can now enable the port and allow to access Samsung M8G2FA 8GB eMMC on Sony NSZ-GS7. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Enable WiFi on Google ChromecastSebastian Hesselbarth
With SDHCI for BG2CD, we can now enable the port and allow to access AzureWave WiFi/BT module on Google Chromecast. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Add SDHCI controller nodes to BG2/BG2CDSebastian Hesselbarth
Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible sdhci controllers, add them to the corresponding DT SoC includes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Enable ethernet on Sony NSZ-GS7Sebastian Hesselbarth
Marvell Berlin BG2 based Sony NSZ-GS7 has one ethernet controller connected to rear RJ45 jack. Enable it by default. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Add phy-connection-type to BG2Q EthernetAntoine Ténart
Internal FastEthernet PHY on BG2Q is connected via MII, add a corresponding phy-connection-type property to the Ethernet node. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Add BG2CD ethernet DT nodesSebastian Hesselbarth
Marvell BG2CD has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Add BG2 ethernet DT nodesSebastian Hesselbarth
Marvell BG2 has two fast ethernet controllers with internal PHY, add the corresponding nodes to SoC dtsi. Tested-by: Antoine Ténart <antoine.tenart@free-electrons.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: Add GPIO leds to Google ChromecastSebastian Hesselbarth
With GPIO support for Marvell Berlin, now add the two gpio-connected LEDs on Google Chromecast. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: enable timer 1 for sched_clockAntoine Ténart
Enable timer 1 to be the source for the sched_clock, allowing to have a more precise value than 1/HZ. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: add a required reset property in the chip controller nodeAntoine Ténart
The chip controller node now also describes the Marvell Berlin reset controller. Add the required 'reset-cells' property. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: enable the eSATA interface on the BG2Q DMPAntoine Ténart
The BG2Q has an AHCI SATA controller with an eSATA interface. Enable it. Only enable the first port, the BG2Q DMP does not support the second one. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: dts: berlin: add the AHCI node for the BG2QAntoine Ténart
The BG2Q has an AHCI SATA controller. Add the corresponding nodes (AHCI, PHY) into its device tree. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2014-10-29ARM: 8180/1: mm: implement no-highmem fast path in kmap_atomic_pfn()Thomas Petazzoni
Since CONFIG_HIGHMEM got enabled on ARMv5 Kirkwood, we have noticed a very significant drop in networking performance. The test were conducted on an OpenBlocks A7 board. Without this patch, the outgoing performance measured with iperf are: - highmem OFF, TSO OFF 544 Mbit/s - highmem OFF, TSO ON 942 Mbit/s - highmem ON, TSO OFF 306 Mbit/s - highmem ON, TSO ON 246 Mbit/s On this Kirkwood platform, the L2 cache is a Feroceon cache, and with this cache, all the range operations have to be done on virtual addresses and not physical addresses. Therefore, whenever CONFIG_HIGHMEM is enabled, the cache maintenance operations call kmap_atomic_pfn() and kunmap_atomic(). However, kmap_atomic_pfn() does not implement the same fast path for non-highmem pages as the one implemented in kmap_atomic(), and this is one of the reason for the performance drop. While this patch does not fully restore the performances, it clearly improves them a lot: without patch with patch - highmem ON, TSO OFF 306 Mbit/s 387 Mbit/s - highmem ON, TSO ON 246 Mbit/s 434 Mbit/s We're still far from the !CONFIG_HIGHMEM performances, but it does improve a bit the situation. Thanks a lot to Ezequiel Garcia and Gregory Clement for all the testing work around this topic. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-10-29ARM: 8183/1: l2c: Improve l2c310_of_parse() error messageFabio Estevam
Russell King suggested [1]: "I'd ask for one change. Please make all these messages start with "L2C-310 OF" not "PL310 OF:". The device is described in ARM documentation as a L2C-310 not PL310. (Also note the : is dropped too - most of the other messages don't have the : either.) The: "PL310 OF: cache setting yield illegal associativity PL310 OF: -1073346556 calculated, only 8 and 16 legal" message could also be changed to something like: "L2C-310 OF cache associativity %d invalid, only 8 or 16 permittedn" [1] http://www.spinics.net/lists/arm-kernel/msg372776.html Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-10-29ARM: 8181/1: Drop extra return statementLaura Abbott
Commit 513510ddba9650fc7da456eefeb0ead7632324f6 (common: dma-mapping: introduce common remapping functions) managed to end up with an extra return statement from the original patch. Drop it. Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-10-29arm: fix wording of "Crotex" in CONFIG_ARCH_EXYNOS3 helpIan Campbell
Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: trivial@kernel.org Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2014-10-29ARM: 8182/1: l2c: Make l2x0_cache_size_of_parse() return 'int'Fabio Estevam
Since commit f3354ab67476dc80 ("ARM: 8169/1: l2c: parse cache properties from ePAPR definitions") the following error is seen on imx6q: [ 0.000000] PL310 OF: cache setting yield illegal associativity [ 0.000000] PL310 OF: -2147097556 calculated, only 8 and 16 legal As imx6q does not pass the "cache-size" and "cache-sets" properties in DT, the function l2x0_cache_size_of_parse() returns early and keep the 'associativity' pointer uninitialized. To fix this problem, return error codes inside l2x0_cache_size_of_parse() and only use the 'associativity' pointer result if l2x0_cache_size_of_parse() succeeds. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-10-29ARM: enable bpf syscallRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-10-28ARM: multi_v7_defconfig: fix support for APQ8084Srinivas Kandagatla
This patch enables configs required to boot IFC6540 board with atleast a serial console. Without this patch there is no serial console. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-10-28ARM: ixp4xx: remove compilation warnings in io.hStefan Hengelein
When arch/arm/mach-ixp4xx/common-pci.c is compiled, two warnings occur: arch/arm/mach-ixp4xx/include/mach/io.h:144: warning: passing argument 1 of '__raw_readb' makes pointer from integer without a cast arch/arm/mach-ixp4xx/include/mach/io.h:79: warning: passing argument 2 of '__raw_writeb' makes pointer from integer without a cast Both functions expect an 'volatile void __iomem *' but get an u32. The 'u32 addr' variable is initialized with the address of an 'volatile void __iomem *' pointer. Passing the pointer directly, avoids the warning and semantics are preserved. This warning was found with vampyr. Signed-off-by: Stefan Hengelein <stefan.hengelein@fau.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-10-28net: pxa168_eth: Fix providing of phy_interface mode on platform_dataSebastian Hesselbarth
Do not add phy include to the board file but platform_data include instead. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-10-28Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds
Pull ARM fixes from Russell King: "A couple of ARM fixes. We fix some printk formats for ptrdiff_t quantities which cause GCC 4.9 to complain, and we also blacklist known buggy GCC 4.8.x compilers as their miscompilation is serious enough to cause filesystem corruption, even through many distros have fixed their versions" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: fix some printk formats ARM: Blacklist GCC 4.8.0 to GCC 4.8.2 - PR58854
2014-10-28ARM: integrator: move AP timer to clocksourceLinus Walleij
This moves the timer/clocksource implementation for the Integrator/AP down to drivers/clocksource and augments the driver a little to use CLOCKSOURCE_OF_DECLARE(). Remove the static mapping of the timer blocks while we're at it. Tested on the Integrator/AP. Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-28ARM: ux500: Add i2c devices to the VAPE PM domainUlf Hansson
The i2c-nomadik driver handle these devices properly from a runtime PM perspective. Therefore, let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-28ARM: ux500: Add spi and ssp devices to the VAPE PM domainUlf Hansson
The spi-pl022 driver handle these devices properly from a runtime PM perspective. Therefore, let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-28ARM: ux500: Add sdi devices to the VAPE PM domainUlf Hansson
The mmci driver handle these devices properly from a runtime PM perspective, including register context save/restore. Therefore let's add them into VAPE PM domain for ux500. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-28ARM: ux500: Add DT node for ux500 PM domainsUlf Hansson
Add a DT node for the ux500 PM domains. Follow the DT semantics of the generic PM domain. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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