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2020-01-21ARM: exynos: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0Geert Uytterhoeven
Support for Samsung Exynos SoCs depends on ARCH_MULTI_V7, which selects ARCH_MULTI_V6_V7. As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for ARCH_EXYNOS4 to select MIGHT_HAVE_CACHE_L2X0. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-21ARM: s3c24xx: Switch to atomic pwm API in rx1950Uwe Kleine-König
Stop using the legacy PWM API which only still exists because there are some users left. Note this change make use of the fact that the value of struct pwm_state::duty_cycle doesn't matter for a disabled PWM and so its value can stay constant simplifying the code a bit. A side effect of the conversion is that the pwm isn't stopped in rx1950_backlight_init() by the call to pwm_apply_args() just before reenabling it when rx1950_lcd_power(1) is called. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-21Merge 5.5-rc7 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-20Merge tag 'samsung-defconfig-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/defconfig Samsung defconfig changes for v5.6 1. Bring back explicitly wanted options which were removed through `make savedefconfig`. savedefconfig removes options selected by other symbol, however developers of this other symbol can remove anytime 'select' statement. 2. Enable NFS v4.1 and v4.2, useful in testing/CI systems. 3. Enable thermal throttling through devfreq framework. * tag 'samsung-defconfig-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: multi_v7_defconfig: Enable devfreq thermal integration ARM: exynos_defconfig: Enable devfreq thermal integration ARM: multi_v7_defconfig: Enable NFS v4.1 and v4.2 ARM: exynos_defconfig: Enable NFS v4.1 and v4.2 ARM: exynos_defconfig: Bring back explicitly wanted options Link: https://lore.kernel.org/r/20200120180227.9061-1-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-20irqchip: Define EXYNOS_IRQ_COMBINERHyunki Koo
This patch is written to clean up dependency of ARCH_EXYNOS Not all exynos device have IRQ_COMBINER, especially aarch64 EXYNOS but it is built for all exynos devices. Thus add the config for EXYNOS_IRQ_COMBINER remove direct dependency between ARCH_EXYNOS and exynos-combiner.c and only selected on the aarch32 devices Signed-off-by: Hyunki Koo <hyunki00.koo@samsung.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20191224211108.7128-1-hyunki00.koo@gmail.com
2020-01-20clk: ti: add clkctrl data dra7 sgxTony Lindgren
This is similar to what we have for omap5 except the gpu_cm address is different, the mux clocks have one more source option, and there's no divider clock. Note that because of the current dts node name dependency for mapping to clock domain, we must still use "gpu-clkctrl@" naming instead of generic "clock@" naming for the node. And because of this, it's probably best to apply the dts node addition together along with the other clock changes. For accessing the GPU, we also need to configure the interconnect target module for GPU similar to what we have for omap5, I'll send that change separately. Cc: Benoit Parrot <bparrot@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20Merge tag 'v5.5-rc7' into perf/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-20dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clockPeter Ujfalusi
Most of the clock related dt-binding header files are located in dt-bindings/clock folder. It would be good to keep all the similar header files at a single location. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-01-20Merge tag 'v5.5-rc7' into efi/core, to pick up fixesIngo Molnar
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2020-01-19Merge tag 'aspeed-5.6-devicetree' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.6 - Cleanups for dtc warnings - Ethernet hardware checksum cleanups. A bug in the driver was fixed so machines don't need to specify this anymore. - Misc improvements * tag 'aspeed-5.6-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: ARM: dts: aspeed: rainier: Add UCD90320 power sequencer ARM: dts: aspeed: rainier: Switch PSUs to unknown version ARM: dts: aspeed: Add SD card for Vesnin ARM: dts: aspeed: yamp: Delete no-hw-checksum ARM: dts: aspeed: netbmc: Delete no-hw-checksum ARM: dts: aspeed: AST2400 disables hw checksum ARM: dts: ibm-power9-dual: Add a unit address for OCC nodes ARM: dts: aspeed-g6: Cleanup watchdog unit address ARM: dts: aspeed-g5: Sort LPC child nodes by unit address ARM: dts: aspeed: Add reg hints to syscon children ARM: dts: aspeed: Cleanup lpc-ctrl and snoop regs ARM: dts: witherspoon: Cleanup gpio-keys-polled properties ARM: dts: swift: Cleanup gpio-keys-polled properties ARM: dts: fp5280g2: Cleanup gpio-keys-polled properties ARM: dts: vesnin: Add unit address for memory node ARM: dts: aspeed-g5: Use recommended generic node name for SDMC ARM: dts: aspeed-g5: Move EDAC node to APB dt-bindings: misc: Document reg for aspeed, p2a-ctrl nodes dt-bindings: pinctrl: aspeed: Add reg property as a hint Link: https://lore.kernel.org/r/CACPK8XepSy6D4CNWjSWDDK0p7Dx_rneWne4t4uyy=di5nx3zmA@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'at91-5.6-defconfig-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.6 #2 - Add pit64 and sdhci support for at91_dt * tag 'at91-5.6-defconfig-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B Link: https://lore.kernel.org/r/20200119235223.GA92283@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'at91-5.6-dt-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 #2 - Add sam9x60 dtsi - New board sam9x60 Evaluation Kit * tag 'at91-5.6-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sam9x60: add device tree for soc and board dt-bindings: arm: add sam9x60-ek board dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr dt-bindings: atmel-smc: add microchip,sam9x60-smc dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc dt-bindings: atmel-nand: add microchip,sam9x60-pmecc dt-bindings: atmel-matrix: add microchip,sam9x60-matrix dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc dt-bindings: atmel-isi: add microchip,sam9x60-isi dt-bindings: atmel-can: add microchip,sam9x60-can dt-bindings: at_xdmac: add microchip,sam9x60-dma dt-bindings: at_xdmac: remove wildcard Link: https://lore.kernel.org/r/20200119234707.GA90094@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-19Merge tag 'v5.6-rockchip-dts32-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt Removal of the simple-panel compatible and some minor additional cleanups. * tag 'v5.6-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Kill off "simple-panel" compatibles ARM: dts: rockchip: rename dwmmc node names to mmc ARM: dts: rockchip: add reg property to brcmf sub node for rk3188-bqedison2qc Link: https://lore.kernel.org/r/3473489.DgqFdXXe5V@phil Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-20ARM: dts: aspeed: rainier: Add UCD90320 power sequencerJim Wright
Change Rainier device tree to use UCD90320 chip and only bind driver to port which excepts PMBus commands. Signed-off-by: Jim Wright <wrightj@linux.vnet.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-01-20ARM: dts: aspeed: rainier: Switch PSUs to unknown versionEddie James
Rainier can use either version of the IBM CFFPS, so don't set the version in the devicetree so the driver can detect it automatically. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-01-20ARM: configs: at91: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64BClaudiu Beznea
Enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B. These are necessary for SAM9X60. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-5-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-19Merge ra.kernel.org:/pub/scm/linux/kernel/git/netdev/netDavid S. Miller
2020-01-19KVM: arm/arm64: Correct AArch32 SPSR on exception entryMark Rutland
Confusingly, there are three SPSR layouts that a kernel may need to deal with: (1) An AArch64 SPSR_ELx view of an AArch64 pstate (2) An AArch64 SPSR_ELx view of an AArch32 pstate (3) An AArch32 SPSR_* view of an AArch32 pstate When the KVM AArch32 support code deals with SPSR_{EL2,HYP}, it's either dealing with #2 or #3 consistently. On arm64 the PSR_AA32_* definitions match the AArch64 SPSR_ELx view, and on arm the PSR_AA32_* definitions match the AArch32 SPSR_* view. However, when we inject an exception into an AArch32 guest, we have to synthesize the AArch32 SPSR_* that the guest will see. Thus, an AArch64 host needs to synthesize layout #3 from layout #2. This patch adds a new host_spsr_to_spsr32() helper for this, and makes use of it in the KVM AArch32 support code. For arm64 we need to shuffle the DIT bit around, and remove the SS bit, while for arm we can use the value as-is. I've open-coded the bit manipulation for now to avoid having to rework the existing PSR_* definitions into PSR64_AA32_* and PSR32_AA32_* definitions. I hope to perform a more thorough refactoring in future so that we can handle pstate view manipulation more consistently across the kernel tree. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200108134324.46500-4-mark.rutland@arm.com
2020-01-19KVM: arm/arm64: Correct CPSR on exception entryMark Rutland
When KVM injects an exception into a guest, it generates the CPSR value from scratch, configuring CPSR.{M,A,I,T,E}, and setting all other bits to zero. This isn't correct, as the architecture specifies that some CPSR bits are (conditionally) cleared or set upon an exception, and others are unchanged from the original context. This patch adds logic to match the architectural behaviour. To make this simple to follow/audit/extend, documentation references are provided, and bits are configured in order of their layout in SPSR_EL2. This layout can be seen in the diagram on ARM DDI 0487E.a page C5-426. Note that this code is used by both arm and arm64, and is intended to fuction with the SPSR_EL2 and SPSR_HYP layouts. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200108134324.46500-3-mark.rutland@arm.com
2020-01-19KVM: arm64: Only sign-extend MMIO up to register widthChristoffer Dall
On AArch64 you can do a sign-extended load to either a 32-bit or 64-bit register, and we should only sign extend the register up to the width of the register as specified in the operation (by using the 32-bit Wn or 64-bit Xn register specifier). As it turns out, the architecture provides this decoding information in the SF ("Sixty-Four" -- how cute...) bit. Let's take advantage of this with the usual 32-bit/64-bit header file dance and do the right thing on AArch64 hosts. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20191212195055.5541-1-christoffer.dall@arm.com
2020-01-18ARM: dts: rockchip: Kill off "simple-panel" compatiblesRob Herring
"simple-panel" is a Linux driver and has never been an accepted upstream compatible string, so remove it. Cc: Heiko Stuebner <heiko@sntech.de> Cc: linux-rockchip@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20200117230851.25434-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18ARM: dts: rockchip: rename dwmmc node names to mmcJohan Jonker
Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-01-18open: introduce openat2(2) syscallAleksa Sarai
/* Background. */ For a very long time, extending openat(2) with new features has been incredibly frustrating. This stems from the fact that openat(2) is possibly the most famous counter-example to the mantra "don't silently accept garbage from userspace" -- it doesn't check whether unknown flags are present[1]. This means that (generally) the addition of new flags to openat(2) has been fraught with backwards-compatibility issues (O_TMPFILE has to be defined as __O_TMPFILE|O_DIRECTORY|[O_RDWR or O_WRONLY] to ensure old kernels gave errors, since it's insecure to silently ignore the flag[2]). All new security-related flags therefore have a tough road to being added to openat(2). Userspace also has a hard time figuring out whether a particular flag is supported on a particular kernel. While it is now possible with contemporary kernels (thanks to [3]), older kernels will expose unknown flag bits through fcntl(F_GETFL). Giving a clear -EINVAL during openat(2) time matches modern syscall designs and is far more fool-proof. In addition, the newly-added path resolution restriction LOOKUP flags (which we would like to expose to user-space) don't feel related to the pre-existing O_* flag set -- they affect all components of path lookup. We'd therefore like to add a new flag argument. Adding a new syscall allows us to finally fix the flag-ignoring problem, and we can make it extensible enough so that we will hopefully never need an openat3(2). /* Syscall Prototype. */ /* * open_how is an extensible structure (similar in interface to * clone3(2) or sched_setattr(2)). The size parameter must be set to * sizeof(struct open_how), to allow for future extensions. All future * extensions will be appended to open_how, with their zero value * acting as a no-op default. */ struct open_how { /* ... */ }; int openat2(int dfd, const char *pathname, struct open_how *how, size_t size); /* Description. */ The initial version of 'struct open_how' contains the following fields: flags Used to specify openat(2)-style flags. However, any unknown flag bits or otherwise incorrect flag combinations (like O_PATH|O_RDWR) will result in -EINVAL. In addition, this field is 64-bits wide to allow for more O_ flags than currently permitted with openat(2). mode The file mode for O_CREAT or O_TMPFILE. Must be set to zero if flags does not contain O_CREAT or O_TMPFILE. resolve Restrict path resolution (in contrast to O_* flags they affect all path components). The current set of flags are as follows (at the moment, all of the RESOLVE_ flags are implemented as just passing the corresponding LOOKUP_ flag). RESOLVE_NO_XDEV => LOOKUP_NO_XDEV RESOLVE_NO_SYMLINKS => LOOKUP_NO_SYMLINKS RESOLVE_NO_MAGICLINKS => LOOKUP_NO_MAGICLINKS RESOLVE_BENEATH => LOOKUP_BENEATH RESOLVE_IN_ROOT => LOOKUP_IN_ROOT open_how does not contain an embedded size field, because it is of little benefit (userspace can figure out the kernel open_how size at runtime fairly easily without it). It also only contains u64s (even though ->mode arguably should be a u16) to avoid having padding fields which are never used in the future. Note that as a result of the new how->flags handling, O_PATH|O_TMPFILE is no longer permitted for openat(2). As far as I can tell, this has always been a bug and appears to not be used by userspace (and I've not seen any problems on my machines by disallowing it). If it turns out this breaks something, we can special-case it and only permit it for openat(2) but not openat2(2). After input from Florian Weimer, the new open_how and flag definitions are inside a separate header from uapi/linux/fcntl.h, to avoid problems that glibc has with importing that header. /* Testing. */ In a follow-up patch there are over 200 selftests which ensure that this syscall has the correct semantics and will correctly handle several attack scenarios. In addition, I've written a userspace library[4] which provides convenient wrappers around openat2(RESOLVE_IN_ROOT) (this is necessary because no other syscalls support RESOLVE_IN_ROOT, and thus lots of care must be taken when using RESOLVE_IN_ROOT'd file descriptors with other syscalls). During the development of this patch, I've run numerous verification tests using libpathrs (showing that the API is reasonably usable by userspace). /* Future Work. */ Additional RESOLVE_ flags have been suggested during the review period. These can be easily implemented separately (such as blocking auto-mount during resolution). Furthermore, there are some other proposed changes to the openat(2) interface (the most obvious example is magic-link hardening[5]) which would be a good opportunity to add a way for userspace to restrict how O_PATH file descriptors can be re-opened. Another possible avenue of future work would be some kind of CHECK_FIELDS[6] flag which causes the kernel to indicate to userspace which openat2(2) flags and fields are supported by the current kernel (to avoid userspace having to go through several guesses to figure it out). [1]: https://lwn.net/Articles/588444/ [2]: https://lore.kernel.org/lkml/CA+55aFyyxJL1LyXZeBsf2ypriraj5ut1XkNDsunRBqgVjZU_6Q@mail.gmail.com [3]: commit 629e014bb834 ("fs: completely ignore unknown open flags") [4]: https://sourceware.org/bugzilla/show_bug.cgi?id=17523 [5]: https://lore.kernel.org/lkml/20190930183316.10190-2-cyphar@cyphar.com/ [6]: https://youtu.be/ggD-eb3yPVs Suggested-by: Christian Brauner <christian.brauner@ubuntu.com> Signed-off-by: Aleksa Sarai <cyphar@cyphar.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-01-17Merge tag 'arm-soc/for-5.6/devicetree-part2' of ↵Olof Johansson
https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoC changes for 5.6, please pull the following: - Nicolas unifies the CMA reserved region declaration between all BCM283x/BCM2711 chips in order for firmwares to easily adjust those based on the use case needs - Nicolas adds the Broadcom STB PCIe Root Complex Device Tree node for the Raspberry Pi 4. The driver will go through the PCIe maintainers pull request for 5.6. * tag 'arm-soc/for-5.6/devicetree-part2' of https://github.com/Broadcom/stblinux: ARM: dts: bcm2711: Enable PCIe controller ARM: dts: bcm283x: Unify CMA configuration Link: https://lore.kernel.org/r/20200117222705.25391-2-f.fainelli@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-17ARM: multi_v7_defconfig: Enable devfreq thermal integrationMarek Szyprowski
Panfrost driver provides a devfreq driver for the Mali GPU and allows to scale GPU core frequency. Enable support for devfreq thermal integration to enable cooling of GPU thermal zone by reducing GPU core frequency. This fixes following warning during boot on Exynos5422-based Odroid XU4: panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: exynos_defconfig: Enable devfreq thermal integrationMarek Szyprowski
Panfrost driver provides a devfreq driver for the Mali GPU and allows to scale GPU core frequency. Enable support for devfreq thermal integration to enable cooling of GPU thermal zone by reducing GPU core frequency. This fixes following warning during boot on Exynos5422-based Odroid XU4: panfrost 11800000.gpu: [drm:panfrost_devfreq_init] Failed to register cooling device Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: multi_v7_defconfig: Enable NFS v4.1 and v4.2Krzysztof Kozlowski
NFS is widely used in debugging and Continuous Integration systems, so enable the newest versions of protocol: v4.1 and v4.2. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-17ARM: exynos_defconfig: Enable NFS v4.1 and v4.2Krzysztof Kozlowski
NFS is widely used in debugging and Continuous Integration systems, so enable the newest versions of protocol: v4.1 and v4.2. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-01-18ARM: dts: uniphier: add reset-names to NAND controller nodeMasahiro Yamada
The Denali NAND controller IP has separate reset control for the controller core and registers. Add the reset-names, and one more phandle accordingly. This is the approved DT-binding. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-17lib/vdso: Make __arch_update_vdso_data() logic understandableThomas Gleixner
The function name suggests that this is a boolean checking whether the architecture asks for an update of the VDSO data, but it works the other way round. To spare further confusion invert the logic. Fixes: 44f57d788e7d ("timekeeping: Provide a generic update_vsyscall() implementation") Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20200114185946.656652824@linutronix.de
2020-01-16Merge tag 'armsoc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "I've been sitting on these longer than I meant, so the patch count is a bit higher than ideal for this part of the release. There's also some reverts of double-applied patches that brings the diffstat up a bit. With that said, the biggest changes are: - Revert of duplicate i2c device addition on two Aspeed (BMC) Devicetrees. - Move of two device nodes that got applied to the wrong part of the tree on ASpeed G6. - Regulator fix for Beaglebone X15 (adding 12/5V supplies) - Use interrupts for keys on Amlogic SM1 to avoid missed polls In addition to that, there is a collection of smaller DT fixes: - Power supply assignment fixes for i.MX6 - Fix of interrupt line for magnetometer on i.MX8 Librem5 devkit - Build fixlets (selects) for davinci/omap2+ - More interrupt number fixes for Stratix10, Amlogic SM1, etc. - ... and more similar fixes across different platforms And some non-DT stuff: - optee fix to register multiple shared pages properly - Clock calculation fixes for MMP3 - Clock fixes for OMAP as well" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (42 commits) MAINTAINERS: Add myself as the co-maintainer for Actions Semi platforms ARM: dts: imx7: Fix Toradex Colibri iMX7S 256MB NAND flash support ARM: dts: imx6sll-evk: Remove incorrect power supply assignment ARM: dts: imx6sl-evk: Remove incorrect power supply assignment ARM: dts: imx6sx-sdb: Remove incorrect power supply assignment ARM: dts: imx6qdl-sabresd: Remove incorrect power supply assignment ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL ARM: omap2plus: select RESET_CONTROLLER ARM: davinci: select CONFIG_RESET_CONTROLLER ARM: dts: aspeed: rainier: Fix fan fault and presence ARM: dts: aspeed: rainier: Remove duplicate i2c busses ARM: dts: aspeed: tacoma: Remove duplicate flash nodes ARM: dts: aspeed: tacoma: Remove duplicate i2c busses ARM: dts: aspeed: tacoma: Fix fsi master node ARM: dts: aspeed-g6: Fix FSI master location ARM: dts: mmp3: Fix the TWSI ranges clk: mmp2: Fix the order of timer mux parents ARM: mmp: do not divide the clock rate arm64: dts: rockchip: Fix IR on Beelink A1 optee: Fix multi page dynamic shm pool alloc ...
2020-01-16Merge tag 'omap-for-v5.6/dt-part2-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More dts changes for omaps for v5.6 merge window Add basic support for first generation Amazon omap3-echo. This got applied rather late as we discussed how to deal with SoC variants with some accelerators unaccessible, and eventually ended up setting up few more SoC specific dtsi files. Eventually we'll need to also detect the disabled accelerators on driver init, but more patching is needed for that. * tag 'omap-for-v5.6/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: Add omap3-echo ARM: dts: Add dtsi files for AM3703, AM3715 and DM3725 Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-4 Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'omap-for-v5.6/soc-smc-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SMC related changes for omaps for v5.6 merge window A series of changes to use optee SMC calls if optee is initialized by the bootloader. Based on the discussions on LAKML in mailing list thread "arm_smccc_smc as generic smc interface?" we don't want to add more quirk handling to arm_smccc_smc() and want to handle it locally instead. * tag 'omap-for-v5.6/soc-smc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: sleep43xx: Call secure suspend/resume handlers ARM: OMAP2+: Use ARM SMC Calling Convention when OP-TEE is available ARM: OMAP2+: Introduce check for OP-TEE in omap_secure_init() ARM: OMAP2+: Add omap_secure_init callback hook for secure initialization Link: https://lore.kernel.org/r/pull-1579200367-372444@atomide.com-2 Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'amlogic-dt' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: Amlogic updates for v5.6 - add DDR clock controller - GPU OPP updates * tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP ARM: dts: meson8b: fix the clock controller compatible string ARM: dts: meson8b: add the DDR clock controller ARM: dts: meson8: add the DDR clock controller ARM: dts: meson: provide the XTAL clock using a fixed-clock dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-dts-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.6 * Add SAW L2 nodes to boot secondary cpus on IPQ40xx * Fix remaining IRQ_TYPE_NONE on APQ8084 * Update tsens node to new style * Add modem remoteproc node to MSM8974 * Move ADSP SMD edge into ADSP remoteproc node for MSM8974 * Add and enable wireless communication subsystem on MSM8974 and Fairphone 2 * Add MSM8974 interconnect provider nodes * Add MSM8974 OCMEM node * tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE ARM: dts: qcom: apq8084: Change tsens definition to new style ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL ARM: dts: msm8974: Add modem remoteproc node ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node ARM: dts: msm8974: Introduce the wcnss remoteproc node ARM: dts: qcom: msm8974: add interconnect nodes ARM: dts: qcom: msm8974: add ocmem node Link: https://lore.kernel.org/r/20200113204448.GE3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'qcom-defconfig-for-5.6' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM defconfig updates for v5.6 * Enable anx78xx HDMI bridge driver * Enable MSM8974 interconnect provider driver * tag 'qcom-defconfig-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: qcom_defconfig: add anx78xx HDMI bridge support ARM: qcom_defconfig: add msm8974 interconnect support Link: https://lore.kernel.org/r/20200113204313.GC3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-soc' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc AT91 SoC for 5.5 - Document new SoC: sam9x60 - rework sam9x60 Kconfig option * tag 'at91-5.6-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: Documentation: add sam9x60 product and datasheet ARM: at91: pm: use of_device_id array to find the proper shdwc node ARM: at91: pm: use SAM9X60 PMC's compatible ARM: debug-ll: select DEBUG_AT91_RM9200_DBGU for sam9x60 drivers: soc: atmel: select POWER_RESET_AT91_SAMA5D2_SHDWC for sam9x60 power: reset: Kconfig: select POWER_RESET_AT91_RESET for sam9x60 drivers: soc: atmel: move sam9x60 under its own config flag ARM: at91: pm: move SAM9X60's PM under its own SoC config flag ARM: at91: Kconfig: add config flag for SAM9X60 SoC ARM: at91: Kconfig: add sam9x60 pll config flag Link: https://lore.kernel.org/r/20200113161612.GA1358903@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-defconfig' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.6 - Add sam9x60 to at91_dt_defconfig * tag 'at91-5.6-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: at91: enable config flags for sam9x60 SoC ARM: configs: at91: use savedefconfig Link: https://lore.kernel.org/r/20200113161033.GA1358651@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'at91-5.6-dt-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.6 - Fix sama5d3 peripheral clock rate range - New boards: Overkiz Smartikz and Kizbox Mini, Microchip SAMA5D27 wlsom1-ek - sama5d2 sdmcc fixes * tag 'at91-5.6-dt-1' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d3: define clock rate range for tcb1 ARM: dts: at91: sama5d3: fix maximum peripheral clock rates ARM: dts: at91: nattis 2: remove unnecessary include ARM: dts: at91: add smartkiz support and a common kizboxmini dtsi file dt-bindings: arm: at91: Document Kizboxmini and Smartkiz boards binding ARM: dts: at91: rearrange kizbox dts using aliases nodes ARM: dts: at91: sama5d27_som1_ek: add the microchip,sdcal-inverted on sdmmc0 ARM: dts: at91: Reenable UART TX pull-ups ARM: dts: at91: sama5d2: set the sdmmc gclk frequency ARM: dts: at91: sama5d27_som1_ek: add i2c filters properties ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek dt-bindings: ARM: at91: Document SAMA5D27 WLSOM1 and Evaluation Kit ARM: dts: at91: sama5d2: mark secumod as a GPIO controller ARM: dts: at91: sama5d2: disable pwm0 by default Link: https://lore.kernel.org/r/20200113155423.GA1357189@piout.net Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'sunxi-dt-for-5.6-2' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt This is our usual set of DT patches for the Allwinner SoCs. It's fairly big this time, but the highlights are: - Enable cpufreq and CPU thermal throttling on the A64 - CLK_CPUX macro usage removed (changed from first pull request) - CSI0 support on the R40 - CSI1 support on the A10 and A20 - SPI support on the R40 - PMU support on the H3, H5, H6 and R40 - MIPI-DSI support on the A64 - PWM support on the H6 - Thermal sensor on the A64, A83t, H3, H5, H6 and R40 - More DT schemas fixes and conversions - New boards: LibreComputer ALL-H5-CC H5, LibreComputer ALL-H3-IT H5, Pine64 H64 Model B, Neutis N5H3 * tag 'sunxi-dt-for-5.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (52 commits) arm64: dts: allwinner: a64: enable DVFS arm64: dts: allwinner: a64: add dtsi with CPU operating points arm64: dts: allwinner: a64: add cooling maps and thermal tripping points arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes arm64: dts: allwinner: sun50i-a64: Use macros for newly exported clocks ARM: dts: sunxi: Use macros for references to CCU clocks arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC H5 board ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes arm64: dts: allwinner: a64: pinebook: Fix lid wakeup ARM: dts: sun8i: r40: Add device node for CSI0 ARM: dts: sun7i: Add CSI1 controller and pinmux options ARM: dts: sun4i: Add CSI1 controller and pinmux options ARM: dts: sunxi: Add missing LVDS resets and clocks ARM: dts: sun8i: r40: Use tcon top clock index macros ARM: dts: sun8i: R40: Add PMU node ARM: dts: sun8i: R40: Upgrade GICC reg size to 8K arm64: dts: allwinner: h6: Add thermal sensor and thermal zones ARM: dts: sunxi: Add Libre Computer ALL-H3-IT H5 board arm64: dts: allwinner: a64: Add MIPI DSI pipeline arm64: dts: allwinner: a64: Add thermal sensors and thermal zones ... Link: https://lore.kernel.org/r/20200113095555.GA29848@wens.csie.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-defconfig-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig i.MX defconfig update for 5.6: - Enable i.MX8MP clock driver in arm64 defconfig. - Enable Crypto CAAM driver support as module in arm64 defconfig. - Enable ILI210X touch driver, USB CDC ACM function, NFS_V4 support and TFP410 DVI bridge driver support in arm32 imx_v6_v7_defconfig. * tag 'imx-defconfig-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: defconfig: Enable CONFIG_CLK_IMX8MP by default arm64: defconfig: Enable CRYPTO_DEV_FSL_CAAM ARM: imx_v6_v7_defconfig: Select the TFP410 driver ARM: imx_v6_v7_defconfig: Enable NFS_V4_1 and NFS_V4_2 support ARM: configs: imx_v6_v7_defconfig: enable USB ACM ARM: imx_v6_v7_defconfig: Enable TOUCHSCREEN_ILI210X Link: https://lore.kernel.org/r/20200113034006.17430-6-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-dt-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX device tree update for 5.6: - New board support: i.MX6SL based Tolino Shine 3 eBook reader, i.MX7ULP Embedded Artists COM Board, i.MX6Q/DL based Gateworks Ventana Boards. - A couple of series from Andrey Smirnov to enhance i.MX6 RDU2 and VF610 ZII boards. - Add revision in board compatible string for imx6sx-sdb-reva and imx7d-sdb-reva board. - A fixup on imx6sl-tolino-shine3 board to remove incorrect power supply assignment. - Set initial buck regulator modes explicitly for phycore-imx6 board, so that a wrong initial mode set by bootloader does not interfere. - Add Add LCD support for imx7d-pico board. - A couple of patches from Michael Grzeschik to enhance USB Host support on i.MX25. - A couple of patches from Michael Trimarchi to remove duplicate Ethernet PHY reset properties on imx6qdl-icore and switch to phy-handle. - A couple of changes to add extirq node support on LS1021A SoC and make use of it on the LS1021A-TSN board. - A few random device additions and improvements on various boards. * tag 'imx-dt-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits) ARM: dts: imx: Add GW5912 board support ARM: dts: imx: Add GW5913 board support ARM: dts: imx: Add GW5910 board support ARM: dts: imx: Add GW5907 board support ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property ARM: dts: imx6sl-tolino-shine3: Remove incorrect power supply assignment ARM: dts: imx7d-pico: Add LCD support ARM: dts: imx6qdl-icore: Add fec phy-handle ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods ARM: dts: imx7: Unify temp-grade and speed-grade nodes ARM: dts: imx6: phycore-som: add pmic onkey device ARM: dts: imx51-babbage: Fix the DVI output description ARM: dts: imx6qdl-apalis: mux HDMI CEC pin ARM: dts: imx6sll: add PXP module ARM: dts: colibri-imx6ull: correct wrong pinmuxing and add comments ARM: dts: vf610-zii-scu4-aib: Add node for switch watchdog ARM: dts: vf610-zii-scu4-aib: Use generic names for DT nodes ARM: dts: vf610-zii-dev-rev-b: Drop redundant I2C properties ARM: dts: phycore-imx6: set buck regulator modes explicitly ARM: dts: imx6: rdu2: Limit USBH1 to Full Speed ... Link: https://lore.kernel.org/r/20200113034006.17430-4-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'imx-soc-5.6' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC changes for 5.6: - Add support for reading serial number from OCOTP on i.MX7ULP. - A patch from Anson to enable ARM_ERRATA_814220 for i.MX6UL & i.MX7D, and a fixup patch from Arnd to select the option only for ARMv7-A. * tag 'imx-soc-5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: only select ARM_ERRATA_814220 for ARMv7-A ARM: imx: Enable ARM_ERRATA_814220 for i.MX6UL and i.MX7D ARM: imx: Add i.MX7ULP SoC serial number support ARM: imx: Fix boot crash if ocotp is not found ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS ARM: dts: imx6ul-evk: Fix peripheral regulator arm64: dts: ls1028a: fix reboot node arm64: dts: ls1028a: fix typo in TMU calibration data ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs ARM: dts: e60k02: fix power button ARM: dts: imx6ul: imx6ul-14x14-evk.dtsi: Fix SPI NOR probing Link: https://lore.kernel.org/r/20200113034006.17430-2-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu into arm/dtOlof Johansson
mvebu dt for 5.6 (part 1) - Add support for SolidRun Clearfog GTR (Armada 385 based board) - Move i2c0 to the SoliRrun Microsom dtsi (Armada 38x based) - Add EEPROM node on SoliRrun Microsom (rev 2.1) - Add EEPROM node on SoliRrun ClearFog Pro * tag 'mvebu-dt-5.6-1' of git://git.infradead.org/linux-mvebu: ARM: dts: armada-388-clearfog: add eeprom ARM: dts: armada-38x-solidrun-microsom: add eeprom ARM: armada-38x-solidrun-microsom: move i2c0 to SOM DT ARM: dts: mvebu: add support for SolidRun Clearfog GTR Link: https://lore.kernel.org/r/874kx13nvh.fsf@FE-laptop Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm-dt' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.6-rc1 This adds memory timings for the PAZ100 and does some minor cleanup for the external memory controller device tree node on Tegra124. * tag 'tegra-for-5.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: dts: tegra20: paz00: Add memory timings ARM: tegra: Rename EMC on Tegra124 ARM: tegra: Let the EMC hardware use the EMC clock Link: https://lore.kernel.org/r/20200111003553.2411874-6-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16Merge tag 'tegra-for-5.6-arm-core' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc ARM: tegra: Core changes for v5.6-rc1 Contains a couple of fixes for RAM repair on Tegra124. * tag 'tegra-for-5.6-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Use clk_m CPU on Tegra124 LP1 resume ARM: tegra: Modify reshift divider during LP1 ARM: tegra: Enable PLLP bypass during Tegra124 LP1 Link: https://lore.kernel.org/r/20200111003553.2411874-5-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16ARM: dts: at91: sam9x60: add device tree for soc and boardSandeep Sheriker Mallikarjun
Add device tree files for SAM9X60 SoC and SAM9X60-EK board. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-6-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-16crypto: {arm,arm64,mips}/poly1305 - remove redundant non-reduction from emitJason A. Donenfeld
This appears to be some kind of copy and paste error, and is actually dead code. Pre: f = 0 ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[0]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[1]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 4); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[2]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 8); Pre: 0 ≤ f < 2³² ⇒ (f >> 32) = 0 f = (f >> 32) + le32_to_cpu(digest[3]); Post: 0 ≤ f < 2³² put_unaligned_le32(f, dst + 12); Therefore this sequence is redundant. And Andy's code appears to handle misalignment acceptably. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Tested-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2020-01-16Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Herbert Xu
Merge crypto tree to pick up hisilicon patch.
2020-01-15ARM: dts: bcm2711: Enable PCIe controllerNicolas Saenz Julienne
This enables bcm2711's PCIe bus, which is hardwired to a VIA Technologies XHCI USB 3.0 controller. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
generated by cgit (git 2.34.1) at 2025-09-16 14:15:53 +0000