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Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Adding IRQ defintions for DaVinci DM355 and default interrupt
priorities for DM355
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Clear any set bits in the 'NEXT' field of the MDCTL register in the
Power and Sleep Controller (PSC) before setting any new bits.
This also allows some minor cleanup by removing some no longer
needed lines of code.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Update the DaVinci GPIO code to work better on non-dm6446 parts,
notably the dm355:
- Only handle the number of GPIOs the chip actually has. So
for example on dm6467, GPIO-42 is the last GPIO, and trying
to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446.
- Enable GPIO interrupts on each 16-bit GPIO-irq bank ...
previously, only the first five were enabled, so GPIO-80
and above (on dm355) wouldn't trigger IRQs.
- Use the right IRQ for each GPIO bank. The wrong values were
used for dm355 chips, so GPIO IRQs got routed incorrectly.
- Handle up to four pairs of 16-bit GPIO banks ... previously
only three were handled, so accessing GPIO-96 and up (e.g. on
dm355) would oops.
- Update several comments that were dm6446-specific.
Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs
on the DM355 EVM.
One thing this doesn't do is handle the way some of the GPIO
numbers on dm6467 are reserved but aren't valid as GPIOs. Some
bitmap logic could fix that if needed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Original code for 2.6.10 and 2.6.28 series done by Texas Instruments
and MontaVista, but major updates and rework done by Troy Kisky and
David Brownell.
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Use clock framework instead of hard-coded CLOCK_TICK_RATE for
determining timer tick frequencies.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Added Kconfig/Makefile entries for STMP platform
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Default configs for STMP3xxx boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Sources: support for 378x boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Sources: support for 37xx boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Sources: common STMP3xxx platform support
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Shared (platform) headers
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Minimal definition of register set for 378x boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Minimal definition of register set for 37xx boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Headers for STMP378x boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Header files for STMP37xx boards
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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GPIO17_SDATA_IN_1 and GPIO36_SDATA_IN_1 are originally designed for the 2nd
codec but unused on the board, yet they are initialized incorrectly by the
bootloader as the SDATA_IN_1 alternate function, thus causing AC97 fail to
work. Fix this issue by configuring these pins as normal GPIO to avoid the
noise from these pins being treated as signals from the 2nd codec.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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cpufreq drivers for pxa2xx/3xx are now built-in automatically as soon as
CPU_FREQ is enabled.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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ARCH_PXA selects HAVE_CLK and COMMON_CLKDEV twice in arch/arm/Kconfig.
Remove the second entry.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs
(0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect.
Actually, only those bits should get updated if the corresponding bits are
set in c->irq_mask as well. Fix this by updating only those relevant bits.
Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Update the rtc-ep93xx driver to use ioremap'ed addresses.
This removes the dependency on <mach/hardware.h> and properly
reports the memory addresses used by the driver in /proc/iomem.
In addition, ep93xx_rtc_init() is updated to use
platform_driver_probe() instead of platform_driver_register().
Also, the device_create_file() calls are now properly checked for
error conditions. The created sysfs files are also now removed
when the driver is removed.
The version number for the driver has been bumped at the request
of Alessandro Zummo.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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arch/arm/mach-sa1100/lart.c:36: error: 'PAGE_SHIFT' undeclared here (not in a function)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In the long run, we may want to place page tables in highmem. However,
pmd_page() has traditionally been coded to convert the physical address
to a virtual one, which won't work with highmem pages. Instead,
translate the physical address to a PFN, and then convert the PFN to a
struct page instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
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* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5460/1: Orion: reduce namespace pollution
[ARM] 5458/1: pcmcia: pxa2xx-sharpsl: check if we do have Scoop config
[ARM] 5457/1: mach-imx gpio buildfix
[ARM] 5456/1: add sys_preadv and sys_pwritev
[ARM] pxa/pcm990: start external GPIOs immediately after built-in ones
[ARM] pxa/palm27x: General fix for Palm27x aSoC driver
[ARM] pxa/mioa701: use GPIO95 as AC97 reset line
[ARM] pxa: merge AC97 platform data structures
[ARM] pxa/magician: remove un-necessary #include of pxa-regs.h and hardware.h
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Add a function omap2_gp_clockevent_set_gptimer() for board-*.c files
to use in .init_irq functions to configure the system tick GPTIMER.
Practical choices at this point are GPTIMER1 or GPTIMER12. Both of
these timers are in the WKUP powerdomain, and so are unaffected by
chip power management. GPTIMER1 can use sys_clk as a source, for
applications where a high-resolution timer is more important than
power management. GPTIMER12 has the special property that it has the
secure 32kHz oscillator as its source clock, which may be less prone
to glitches than the off-chip 32kHz oscillator. But on HS devices, it
may not be available for Linux use.
It appears that most boards are fine with GPTIMER1, but BeagleBoard
should use GPTIMER12 when using a 32KiHz timer source, due to hardware bugs
in revisions B4 and below. Modify board-omap3beagle.c to use GPTIMER12.
This patch originally used a Kbuild config option to select the GPTIMER,
but was changed to allow this to be specified in board-*.c files, per
Tony's request.
Kalle Vallo <kalle.valo@nokia.com> found a bug in an earlier version of
this patch - thanks Kalle.
Tested on Beagle rev B4 ES2.1, with and without CONFIG_OMAP_32K_TIMER, and
3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: Kalle Valo <kalle.valo@nokia.com>
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All GP timers on OMAP2/3 can generate wakeup events. The wakeup status is
cleared in the PRCM interrupt handler.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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GPTIMER12 IRQ is at IRQ 95 on OMAP3, unlike OMAP2. (ref: OMAP34xx
Multimedia High Security (HS) Device Silicon Revision 3.0 Security
Addendum Rev. B, SWPU119B)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Typo error when requesting for clock for dsp in omap1
Signed-off-by: Arun KS <arunks@mistralsolutions.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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This patch avoids waiting for the camera module to become ready,
since it doesn't have IDLEST bit.
Based on a earlier hack done by Paul Walmsley on Sep 9 2008 on
linux-omap tree.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Commit 8ad8ff6548f1c0bcbeaa02f274b3927c5015a921 breaks the OMAP2xxx
cpu_mask code, which causes OMAP2xxx to panic on boot. Fix by
removing the cpu_mask auto variable and by changing CK_242X
and CK_243X to use RATE_IN_242X/RATE_IN_243X.
Resolves
<1>Unable to handle kernel NULL pointer dereference at virtual address 0000000c
<1>pgd = c0004000
<1>[0000000c] *pgd=00000000
Internal error: Oops: 5 [#1]
Modules linked in:
CPU: 0 Not tainted (2.6.29-omap1 #32)
PC is at omap2_clk_set_parent+0x104/0x120
LR is at omap2_clk_set_parent+0x28/0x120
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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Symbols like SOFT_RESET are way too generic to be exported at large.
To avoid this, let's move the mbus bridge register defines into a
separate file and include it where needed. This affects mach-kirkwood,
mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all
share code in plat-orion which relies on those defines.
Some other defines have been moved to narrower scopes, or simply deleted
when they had no user.
This fixes compilation problem with mpt2sas on the above listed
platforms.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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SPURIOUSIRQ is contained in bits 31:7 of INTC_SIR, so
INTC_SIR must be right shifted by 7, not 6.
No change in logic, only changes for better readability.
Refer to register definition of INTCPS_SIR_IRQ in OMAP3 Manual.
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Flush posted write to IRQSTATUS register in GPIO IRQ handler.
This eliminates the below error for all peripherals that use GPIO interrupts.
<4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Removed duplicated #include in arch/arm/mach-omap2/board-rx51.c.
Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The GPIO IRQ enable/disable path attempts to also enable IRQ wake
support for the parent GPIO bank IRQ as well. However, since there is
no 'set_wake' hook for the bank IRQs, these calls will always fail.
Also, since the enable will fail on the suspend path, the disable on
the resume path will trigger unbalanced enable/disable warnings.
This was discovered in the suspend/resume path on OMAP3/Beagle using
the gpio-keys driver which disables/re-enables GPIO IRQ wakeups in the
suspend/resume path.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In linus' git tree the functions can be found at:
vi arch/arm/mach-omap2/usb-tusb6010.c +200 - tusb6010_platform_retime()
vi arch/arm/mach-omap2/gpmc.c +94 - gpmc_get_fclk_period()
vi arch/arm/mach-omap2/usb-tusb6010.c +53 - tusb_set_async_mode()
vi arch/arm/mach-omap2/usb-tusb6010.c +111 - tusb_set_sync_mode()
is -ENODEV appropriate when sysclk_ps == 0?
This was found by code analysis, please review.
------------------------------>8-------------8<---------------------------------
gpmc_get_fclk_period() may return 0 when gpmc_l3_clk is not enabled. This is
not checked in tusb6010_platform_retime() nor in tusb_set_async_mode() it
seems. In tusb_set_sync_mode() this may result in a division by zero.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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There is no anymore legacy driver for OMAP24XX Enhanced Audio Controller
in linux-omap and it was newer in mainline so cleanup these unneeded
defines and initialization code.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Simple simplification...
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Simplify board-h2 MMC setup
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Remove unused power_pin
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This should be done with GPIO calls. Patches against the
mainline tree welcome to add the necessary working functionality
back.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Fix the possible race condition in omap_free_dma(). Function omap_free_dma()
sets the dev_id = -1 and then accesses the channel afterwards to clear it.
But setting the dev_id=-1 makes the channel available for allocation again.
So it is possible someone else can grab it and results are unpredictable.
To avod this DMA channle is cleared first and then the dev_id = -1 is set.
Thanks to McNeil, Sean <sean.mcneil@ti.com> for ointing out this issue.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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