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Two files remain in <mach/*> for U300: timex.h and
uncompress.h. The former is done away with by using
defaults, the latter is unused in multiplatform.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that we removed our dependency on <mach/*> the U300
can be converted to mutliplatform. Remove the invalid restriction
that U300 would not support AUTO_ZRELADDR (it does) and update
the defconfig in the process.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This register base file is now only used in the machine
itself so move it down into mach-u300.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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All IRQs are now obtained from the device tree, and this file
is unused, so delete it.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This file is now unused and can be deleted.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Get rid of the <mach/syscon.h> header as a prerequisite for
multiplatform support. Do this by pushing the registers down
to their respective drivers and deleting the unused remainder.
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This rids the dependency to <mach/hardware.h> (which is an
implicit dependency to <mach/u300-regs.h>) from the U300
debug macro. Take this opportunity to update the file
header.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This moves the U300 debug macro to the debug headers to
make way for multiplatform support.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We have now transferred all the U300 peripherals to the device
tree, so we just select USE_OF, and delete all static board data,
then require that this platform shall be booted using the device
tree and nothing else.
This gets rid of the MMCI (PL180), PL022, and serial PL011
platform data entries and more.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This registers the U300 FSMC flash controller from the
device tree, and defines the three partitions. Skip the
BBT scan as in the current platform data.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This probes the U300 dummy-spichip from the device tree
and adds the apropriate node to the tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This registers the PL022 PrimeCell from the U300 device
tree. We make a new copy of the platform data for the
device tree boot path, as the old platform data is in an
older file which will be going away.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the COH 901 318 DMA controller to the U300
device tree. All devices now converted to device tree
so far will start to find their DMA channels.
Note that the U300 is not yet using the device tree
to obtain DMA channels, but this is a first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds DMA channel assignments to the MMC/SD-controller
and the two UARTs already in the U300 device tree, as we
have now defined a way to obtain DMA channels from the
device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for the U300 MMC/SD card slot from the device
tree boot. No other changes needed.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now that we have enabled board power and the AB3100 regulators,
put the regulator data into the device tree and enable it so
we can start to tie regulators to devices. To begin with we're
only supplying the power to the board itself.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for setting up the board power from the
device tree on the U300. We use a board-specific node in the
device tree for the S365 board and bind a regulator for the
board power to this node.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds the COH 901 331 RTC to the U300 device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Make sure hyp-stub.S gets removed during make distclean,
this left over file was introduced in commit:
424e599 ARM: zImage/virt: hyp mode entry support for the zImage loader
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Dave Martin <dave.martin@linaro.org>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Commit f8b63c1 made flush_kernel_dcache_page a no-op assuming that
the pages it needs to handle are kernel mapped only. However, for
example when doing direct I/O, pages with user space mappings may
occur.
Thus, continue to do lazy flushing if there are no user space
mappings. Otherwise, flush the kernel cache lines directly.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org> # 3.2+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This commit fixes the ID and mask for the PJ4B which was too
restrictive and didn't match the CPU of the Armada 370 SoC.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This bug was introduced in commit e651eab0.
Some v4/v5 platforms failed to boot due to this.
Signed-off-by: Po-Yu Chuang <ratbert.chuang@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR
register returns zero when it should return one. This leads to cache
maintenance operations which rely on this value to not function as
intended, causing data corruption.
The workaround for this errata is to detect affected CPUs and correct
the LoUIS value read.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This is an external component and may or may not be there, while the
internal clock always works.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
[ horms+renesas@verge.net.au this is the setup-r8a7790.c
which I somehow miss-applied as part of another patch.
The clock-r8a7790.c portion of this patch has already been merged. ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add a DT fragment for the Zed Zynq platform and a corresponding
target to the Makefile
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Add a DT fragment for the zc706 Zynq platform and a corresponding
target to the Makefile.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Set the default status for UARTs to disabled in the zynq-7000.dtsi file
and let board dts files enable the UARTs on demand.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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It is not necessary to have board specific compatibility strings
in the platform code. The board dts files can use the more generic
'xlnx,zynq-7000' string.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Bandgap is a device used to measure temperature on electronic
equipments. It is widely used in digital integrated circuits. It is
based on the dependency between silicon voltage and temperature.
This patch introduce HAS_BANDGAP config entry. This config is a boolean
value so that arch code can flag if they feature a bandgap device.
This config entry follows the same idea behind ARCH_HAS_CPUFREQ.
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Fabio Stevam <festevam@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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When scheduling an mm on a CPU where it hasn't previously been used, we
flush the icache on that CPU so that any code loaded previously on
a different core can be safely executed.
For cores with hardware broadcasting of cache maintenance operations,
this is clearly unnecessary, since the inner-shareable invalidation in
__sync_icache_dcache will affect all CPUs.
This patch conditionalises the icache flush in switch_mm based on
cache_ops_need_broadcast().
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Albin Tonnerre <albin.tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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When zImage is loaded into RAM at a low address but TEXT_OFFSET
is set higher, we risk overwriting ourself with the page table
needed to turn on the cache as it is located relative to the relocation
address. Let's defer the cache setup after relocation in that case.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reported-by: Stephen Boyd <sboyd@codeurora.org>
Tested-by: Stephen Boyd <sboyd@codeurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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An exclusive store instruction may fail for reasons other than lock
contention (e.g. a cache eviction during the critical section) so, in
line with other architectures using similar exclusive instructions
(alpha, mips, powerpc), retry the trylock operation if the lock appears
to be free but the strex reported failure.
Reported-by: Tony Thompson <anthony.thompson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Running an OABI_COMPAT kernel on an SMP platform can lead to fun and
games with page aging.
If one CPU issues a swi instruction immediately before another CPU
decides to mkold the page containing the swi instruction, then we will
fault attempting to load the instruction during the vector_swi handler
in order to retrieve its immediate field. Since this fault is not
currently dealt with by our exception tables, this results in a panic:
Unable to handle kernel paging request at virtual address 4020841c
pgd = c490c000
[4020841c] *pgd=84451831, *pte=bf05859d, *ppte=00000000
Internal error: Oops: 17 [#1] PREEMPT SMP ARM
Modules linked in: hid_sony(O)
CPU: 1 Tainted: G W O (3.4.0-perf-gf496dca-01162-gcbcc62b #1)
PC is at vector_swi+0x28/0x88
LR is at 0x40208420
This patch wraps all of the swi instruction loads with the USER macro
and provides a shared exception table entry which simply rewinds the
saved user PC and returns from the system call (without setting tbl, so
there's no worries with tracing or syscall restarting). Returning to
userspace will re-enter the page fault handler, from where we will
probably send SIGSEGV to the current task.
Reported-by: Wang, Yalin <yalin.wang@sonymobile.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds the missing VPU devicetree node for i.MX27 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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The gpio-ranges properties in vf610.dtsi were written according to an
older version of the GPIO bindings. Unfortunately, these were changed
incompatibly in commit 86853c8 "gpio: add gpio offset in gpio range
cells property". This patch adds the missing required extra cell in each
gpio-ranges property.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Enable WM8962 ALSA machine driver via devicetree.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Enable SSI2 and its pin configuration in AUDMUX.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add WM8962 CODEC support and enable its parent I2C bus.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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On Sabre SD, system controls WM8962 power by pulling up/down GPIO_4_10,
so add a regulator controled by GPIO_4_10 for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add a pinctrl for AUDMUX used on imx6dl-sabresd.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add a pinctrl for I2C1 used on imx6q/dl-sabresd.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add support for imx6q Phytec phyFLEX-i.MX6 Quad (aka pfla02 and pbab01).
- Module pfla02
- Carrier-Board pbab01
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Add a group to the usdhc2 and enet pinctrl.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This patch adds name for NOR flash. This keeps compatibility for
commandline partitions parsing from old bootloaders and make name
of device same for DT and non-DT boot.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This patch adds the SHDC devicetree node for PCM970 board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This patch adds the missing SDHC devicetree nodes for i.MX27 SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This patch adds the missing DMA devicetree node for i.MX27 SoCs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Sascha Hauer <s.hauer@pengutonix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Enable the WEIM NOR for imx6q{dl}-sabreauto boards.
For the pin conflict with SPI NOR, its status is set to "disabled".
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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