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2016-03-01ARM: dts: exynos: Add cooling levels for Exynos5420 CPUsKrzysztof Kozlowski
On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and 12 steps for big core (700-1800 MHz). Add respective cooling cells. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
2016-03-01ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1Peter Ujfalusi
Add hwmod data for the eDMA blocks: - TPCC: Third-party channel controller - TPTC0: Third-party transfer controller 0 - TPTC1: Third-party transfer controller 1 The TPCC's clock gating status follows the status of its clock and power domain. This means that the hwmod code can not directly control the TPCC enable/disable status. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [paul@pwsan.com: rephrased last two sentences of the patch description] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-03-01Merge tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux into next/socArnd Bergmann
Merge "pxa changes for v4.6 cycle" from Robert Jarzmik: This is a minor cycle with : - cleanup fixes from Arnd, mainly build oriented and sparse type ones - dma fixes for requestors above 32 (impacting mainly camera driver) - some minor cleanup on pxa3xx device-tree side * tag 'pxa-for-4.6' of https://github.com/rjarzmik/linux: dmaengine: pxa_dma: fix the maximum requestor line ARM: pxa: add the number of DMA requestor lines dmaengine: mmp-pdma: add number of requestors dma: mmp_pdma: Add the #dma-requests DT property documentation ARM: pxa: pxa3xx device-tree support cleanup ARM: pxa: don't select RFKILL if CONFIG_NET is disabled ARM: pxa: fix building without IWMMXT ARM: pxa: move extern declarations to pm.h ARM: pxa: always select one of the two CPU types ARM: pxa: don't select GPIO_SYSFS for MIOA701 ARM: pxa: mark unused eseries code as __maybe_unused ARM: pxa: mark spitz_card_pwr_ctrl as __maybe_unused ARM: pxa: define clock registers as __iomem
2016-02-29ARM: dts: DRA7: Add dt nodes for PWMSSVignesh R
Add PWMSS device tree nodes for DRA7 SoC family and add documentation for dt bindings. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29ARM: dts: DRA7: Add TBCLK for PWMSSVignesh R
tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux clock to control ehrpwm tbclk. The TRM says, tbclk is derived from SYSCLKOUT. SYSCLKOUT is nothing but ehrpwm functional clock derived from the gateable interface and functional clock of PWMSS(l4_root_clk_div). Refer AM57x TRM SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1, Table 29-19 and the NOTE at the end of the table. [1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-03-01Merge tag 'pxa-dt-4.6' of https://github.com/rjarzmik/linux into next/dtArnd Bergmann
Merge pxa dt for v4.6 from Robert Jarzmik: This device-tree pxa update brings : - a single fix for nand dmaengine node * tag 'pxa-dt-4.6' of https://github.com/rjarzmik/linux: ARM: dts: pxa: fix dma engine node to pxa3xx-nand
2016-03-01Merge tag 'sunxi-dt-for-4.6' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt Merge "Allwinner DT Additions for 4.6" from Maxime Ripard: Quite a few changes, among which: - Support for the A83t - Support for the eMMC DDR on a few boards - Support for the OTG controller on a few boards - New boards: Itead Ibox, Cubietruck plus, Homlet v2, Lamobo R1 * tag 'sunxi-dt-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (34 commits) ARM: dts: sun8i: Add leds and switch on Orangepi Plus boards ARM: dts: sun8i: Add ir receiver nodes to H3 dtsi ARM: dts: sun8i-h3: Add R_PIO controller node to the dtsi dts: sun8i-h3: Add APB0 related clocks and resets ARM: dts: sun7i: Add dts file for the lamobo-r1 board ARM: dts: sun4i: Enable USB DRC on Hyundai-a7hd ARM: dts: sun4i: Enable USB DRC on the MK802 ARM: dts: sun8i: q8-common: Add AXP223 PMIC device and regulator nodes ARM: dts: sun8i: sinlinx-sina33: Add AXP223 PMIC device and regulator nodes ARM: dts: sun7i: Enable USB DRC on Olimex A20 EVB ARM: dts: sun7i: Enable USB DRC on MK808C ARM: dts: sunxi: Fix #interrupt-cells for PIO in H3 ARM: dts: sun8i-a83t: Correct low speed oscillator clocks ARM: dts: sun9i: a80-optimus: Remove i2c3 and uart4 ARM: dts: sun4i: Itead Iteaduino to use common code ARM: dts: sun7i: Add Itead Ibox support ARM: dts: sunxi: Add sunxi-itead-core-common.dtsi ARM: dts: sun9i: cubieboard4: Enable hardware reset and HS-DDR for eMMC ARM: dts: sun9i: a80-optimus: Enable hardware reset and HS-DDR for eMMC ARM: dts: sun9i: Include SDC2_RST pin in mmc2_8bit_pins ...
2016-03-01Merge tag 'sunxi-defconfig-for-4.6' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/defconfig Merge "Allwinner defconfig changes for 4.6" from Maxime Ripard: A bunch of changes to add new drivers to the sunxi and multi_v7 defconfigs, most notably the USB OTG that is finally enabled. * tag 'sunxi-defconfig-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: sunxi_defconfig: Enable MUSB HDRC driver with Allwinner glue ARM: multi_v7_defconfig: Enable A10 audio codec driver as module ARM: multi_v7_defconfig: Enable MUSB HDRC driver with Allwinner glue ARM: sunxi_defconfig: Enable INPUT_EVDEV so axp20x-pek can be used ARM: sunxi_defconfig: Enable A10 audio codec driver ARM: sunxi_defconfig: Enable sunxi IR driver
2016-03-01Merge tag 'sunxi-core-for-4.6' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc Merge "Allwinner core changes for 4.6" from Maxime Ripard: Just introduce the A83T support. * tag 'sunxi-core-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: ARM: sunxi: Introduce Allwinner for A83T support
2016-02-29ARM: dts: DRA7: change address-cells and size-cellsLokesh Vutla
DRA7 SoC has the capability to support DDR memory upto 4GB. In order to represent this in memory dt node, the address-cells and size cells should be 2. So, changing the address-cells and size-cells to 2 and updating the memory nodes accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29Merge tag 'mvebu-defconfig-4.6-2' of git://git.infradead.org/linux-mvebu ↵Arnd Bergmann
into next/defconfig Merge "mvebu defconfig for 4.6 (part 2)" from Gregory CLEMENT: enable SRAM support in mvebu_v7_defconfig * tag 'mvebu-defconfig-4.6-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: enable SRAM support in mvebu_v7_defconfig
2016-02-29ARM: multi_v7_defconfig: Enable LP872x regulator supportPaul Kocialkowski
The LP872x regulator is used in the LG Optimus Black codename sniper to supply the external mmc card. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29Merge tag 'mvebu-dt-4.6-2' of git://git.infradead.org/linux-mvebu into next/dtArnd Bergmann
Merge "mvebu dt for 4.6 (part 2)" from Gregory CLEMENT: - Reorder Ethernet node on Armada 38x SoCs - Add device tree for buffalo linkstation ls-gl - Use the more accurate armada-370-sata string for SATA on Armada 375 - Add NAND description to Armada 370 DB and Armada XP DB * tag 'mvebu-dt-4.6-2' of git://git.infradead.org/linux-mvebu: ARM: dts: mvebu: add NAND description to Armada 370 DB and Armada XP DB ARM: dts: armada-375: use armada-370-sata for SATA ARM: dts: orion5x: add device tree for buffalo linkstation ls-gl ARM: dts: orion5x: split linkstation lswtgl into common and device parts ARM: dts: armada-38x: add reference to ETH connectors for A385-AP ARM: dts: armada-38x: change order of ethernet DT nodes on Armada 38x ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl ARM: dts: kirkwood: use unique machine name for ds112
2016-02-29Merge tag 'mvebu-soc-4.6-1' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann
next/fixes-non-critical Merge "mvebu soc for 4.6 (part 1)" from Gregory CLEMENT: randconfig warning fixes for mvebu SoCs * tag 'mvebu-soc-4.6-1' of git://git.infradead.org/linux-mvebu: ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused ARM: mv78xx0: avoid unused function warning ARM: orion: only select I2C_BOARDINFO when using I2C
2016-02-29Merge tag 'mvebu-cleanup-4.6-2' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann
next/cleanup Merge "mvebu cleanup for 4.6 (part 2)" from Gregory CLEMENT: Add a missing call to of_node_put() armada_xp_smp_prepare_cpus() * tag 'mvebu-cleanup-4.6-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: add missing of_node_put()
2016-02-29ARM: omap2plus_defconfig: Enable LP872x regulator supportPaul Kocialkowski
The LP872x regulator is used in the LG Optimus Black codename sniper to supply the external mmc card. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29ARM: dts: omap3-sniper: USB OTG supportPaul Kocialkowski
This adds support for USB OTG on the Optimus Black. The HSUSB0 interface is connected to the TWL4030 USB PHY. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29ARM: dts: LG Optimus Black codename sniper basic supportPaul Kocialkowski
The LG Optimus Black codename sniper is a smartphone that was designed and manufactured by LG Electronics (LGE) and released back in 2011. It is using an OMAP3630 SoC, GP version. This adds devicetree support for the device, with only a few basic features supported, such as debug uart, i2c, internal emmc and external mmc. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-02-29KVM: arm/arm64: timer: Add active state cachingMarc Zyngier
Programming the active state in the (re)distributor can be an expensive operation so it makes some sense to try and reduce the number of accesses as much as possible. So far, we program the active state on each VM entry, but there is some opportunity to do less. An obvious solution is to cache the active state in memory, and only program it in the HW when conditions change. But because the HW can also change things under our feet (the active state can transition from 1 to 0 when the guest does an EOI), some precautions have to be taken, which amount to only caching an "inactive" state, and always programing it otherwise. With this in place, we observe a reduction of around 700 cycles on a 2GHz GICv2 platform for a NULL hypercall. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Switch the CP reg search to be a binary searchMarc Zyngier
Doing a linear search is a bit silly when we can do a binary search. Not that we trap that so many things that it has become a burden yet, but it makes sense to align it with the arm64 code. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Rename struct coproc_reg::is_64 to is_64bitMarc Zyngier
As we're going to play some tricks on the struct coproc_reg, make sure its 64bit indicator field matches that of coproc_params. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Enforce sorting of all CP tablesMarc Zyngier
Since we're obviously terrible at sorting the CP tables, make sure we're going to do it properly (or fail to boot). arm64 has had the same mechanism for a while, and nobody ever broke it... Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Properly sort the invariant tableMarc Zyngier
Not having the invariant table properly sorted is an oddity, and may get in the way of future optimisations. Let's fix it. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm64: KVM: Add a new vcpu device control group for PMUv3Shannon Zhao
To configure the virtual PMUv3 overflow interrupt number, we use the vcpu kvm_device ioctl, encapsulating the KVM_ARM_VCPU_PMU_V3_IRQ attribute within the KVM_ARM_VCPU_PMU_V3_CTRL group. After configuring the PMUv3, call the vcpu ioctl with attribute KVM_ARM_VCPU_PMU_V3_INIT to initialize the PMUv3. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm64: KVM: Introduce per-vcpu kvm device controlsShannon Zhao
In some cases it needs to get/set attributes specific to a vcpu and so needs something else than ONE_REG. Let's copy the KVM_DEVICE approach, and define the respective ioctls for the vcpu file descriptor. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm64: KVM: Free perf event of PMU when destroying vcpuShannon Zhao
When KVM frees VCPU, it needs to free the perf_event of PMU. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm64: KVM: Add PMU overflow interrupt routingShannon Zhao
When calling perf_event_create_kernel_counter to create perf_event, assign a overflow handler. Then when the perf event overflows, set the corresponding bit of guest PMOVSSET register. If this counter is enabled and its interrupt is enabled as well, kick the vcpu to sync the interrupt. On VM entry, if there is counter overflowed and interrupt level is changed, inject the interrupt with corresponding level. On VM exit, sync the interrupt level as well if it has been changed. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Use common version of timer-sr.cMarc Zyngier
Using the common HYP timer code is a bit more tricky, since we use system register names. Nothing a set of macros cannot work around... Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Use common version of vgic-v2-sr.cMarc Zyngier
No need to keep our own private version, the common one is strictly identical. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Move kvm/hyp/hyp.h to include/asm/kvm_hyp.hMarc Zyngier
In order to be able to use the code located in virt/kvm/arm/hyp, we need to make the global hyp.h file accessible from include/asm, similar to what we did for arm64. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm64: KVM: Skip HYP setup when already running in HYPMarc Zyngier
With the kernel running at EL2, there is no point trying to configure page tables for HYP, as the kernel is already mapped. Take this opportunity to refactor the whole init a bit, allowing the various parts of the hypervisor bringup to be split across multiple functions. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm/arm64: Add new is_kernel_in_hyp_mode predicateMarc Zyngier
With ARMv8.1 VHE extension, it will be possible to run the kernel at EL2 (aka HYP mode). In order for the kernel to easily find out where it is running, add a new predicate that returns whether or not the kernel is in HYP mode. For completeness, the 32bit code also get such a predicate (always returning false) so that code common to both architecture (timers, KVM) can use it transparently. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29arm/arm64: KVM: Handle out-of-RAM cache maintenance as a NOPMarc Zyngier
So far, our handling of cache maintenance by VA has been pretty simple: Either the access is in the guest RAM and generates a S2 fault, which results in the page being mapped RW, or we go down the io_mem_abort() path, and nuke the guest. The first one is fine, but the second one is extremely weird. Treating the CM as an I/O is wrong, and nothing in the ARM ARM indicates that we should generate a fault for something that cannot end-up in the cache anyway (even if the guest maps it, it will keep on faulting at stage-2 for emulation). So let's just skip this instruction, and let the guest get away with it. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Remove __kvm_hyp_exit/__kvm_hyp_exit_endMarc Zyngier
I have no idea what these were for - probably a leftover from an early implementation. Good bye! Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Remove handling of ARM_EXCEPTION_DATA/PREF_ABORTMarc Zyngier
These are now handled as a panic, so there is little point in keeping them around. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Remove unused hyp_pc fieldMarc Zyngier
This field was never populated, and the panic code already does something similar. Delete the related code. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Cleanup asm-offsets.cMarc Zyngier
Since we don't have much assembler left, most of the KVM stuff in asm-offsets.c is now superfluous. Let's get rid of it. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Turn CP15 defines to an enumMarc Zyngier
Just like on arm64, having the CP15 registers expressed as a set of #defines has been very conflict-prone. Let's turn it into an enum, which should make it more manageable. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Remove __weak attributesMarc Zyngier
Now that the old code is long gone, we can remove all the weak attributes, as there is only one version of the code. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Switch to C-based stage2 initMarc Zyngier
As we now have hooks to setup VTCR from C code, let's drop the original VTCR setup and reimplement it as part of the HYP code. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Remove the old world switchMarc Zyngier
As we now have a full reimplementation of the world switch, it is time to kiss the old stuff goodbye. I'm not sure we'll miss it. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Change kvm_call_hyp return type to unsigned longMarc Zyngier
Having u64 as the kvm_call_hyp return type is problematic, as it forces all kind of tricks for the return values from HYP to be promoted to 64bit (LE has the LSB in r0, and BE has them in r1). Since the only user of the return value is perfectly happy with a 32bit value, let's make kvm_call_hyp return an unsigned long, which is 32bit on ARM. This solves yet another headache. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add panic handling codeMarc Zyngier
Instead of spinning forever, let's "properly" handle any unexpected exception ("properly" meaning "print a spat on the console and die"). This has proved useful quite a few times... Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add HYP mode entry codeMarc Zyngier
This part is almost entierely borrowed from the existing code, just slightly simplifying the HYP function call (as we now save SPSR_hyp in the world switch). Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add populating of fault data structureMarc Zyngier
On guest exit, we must take care of populating our fault data structure so that the host code can handle it. This includes resolving the IPA for permission faults, which can result in restarting the guest. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add the new world switch implementationMarc Zyngier
The new world switch implementation is modeled after the arm64 one, calling the various save/restore functions in turn, and having as little state as possible. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add VFP lazy save/restore handlerMarc Zyngier
Similar to the arm64 version, add the code that deals with VFP traps, re-enabling VFP, save/restoring the registers and resuming the guest. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add guest entry codeMarc Zyngier
Add the very minimal piece of code that is now required to jump into the guest (and return from it). This code is only concerned with save/restoring the USR registers (r0-r12+lr for the guest, r4-r12+lr for the host), as everything else is dealt with in C (VFP is another matter though). Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add banked registers save/restoreMarc Zyngier
Banked registers are one of the many perks of the 32bit architecture, and the world switch needs to cope with it. This requires some "special" accessors, as these are not accessed using a standard coprocessor instruction. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-02-29ARM: KVM: Add VFP save/restoreMarc Zyngier
This is almost a copy/paste of the existing version, with a couple of subtle differences: - Only write to FPEXC once on the save path - Add an isb when enabling VFP access The patch also defines a few sysreg accessors and a __vfp_enabled predicate that test the VFP trapping state. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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