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2020-06-25ARM: tegra: The Tegra30 SDHCI is not backwards-compatibleThierry Reding
The SDHCI on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: The Tegra30 DC is not backwards-compatibleThierry Reding
The display controller on Tegra30 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Remove spurious comma from node nameThierry Reding
This was probably left there by mistake or perhaps was a typo in the first place. Remove it. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add parent clock to DSI outputThierry Reding
The DSI output needs to specify a parent clock that will be used to drive both the output and the display controller. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for SRAM nodesThierry Reding
SRAM nodes should be named sram@<unit-address> to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: seaboard: Use standard battery bindingsThierry Reding
Seaboard uses a non-existing, possibly obsoleted, binding for the battery. Move to the standard binding which seems to be a super- set of the odl binding. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard names for LED nodesThierry Reding
LED nodes should be named led-* to match the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use numeric unit-addressesThierry Reding
Unit-addresses should be numeric. This fixes a validation failure seen using the json-schema tooling. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: medcom-wide: Remove extra panel power supplyThierry Reding
Simple panels can only have a single power supply. The second listed supply is not needed because it is also the input supply of the first supply and therefore will always be on at the same time. In retrospect the panel probably doesn't qualify as simple since it apparently does need both of these supplies, even if in the case of the Medcom Wide it isn't necessary to explicitly hook them up. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper unit-addresses for OPPsThierry Reding
Use commas rather than underscores to separate the various parts of the unit-address in CPU OPPs to make them properly validate under the json- schema bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing clock-names for SDHCI controllersThierry Reding
The Tegra SDHCI controllers need to have a clock-names property according to the bindings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Fix order of XUSB controller clocksThierry Reding
This is purely to make the json-schema validation tools happy because they cannot deal with string arrays that may be in arbitrary order. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add #reset-cells to Tegra124 memory controllerThierry Reding
The memory controller exposes a set of memory client resets and needs to specify the #reset-cells property in order to advertise the number of cells needed to describe each of the resets. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing panel power suppliesThierry Reding
Both Nyan boards as well as Venice2 are missing panel power supplies. Add them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add micro-USB A/B port on Jetson TK1Thierry Reding
Run the micro-USB A/B port on Jetson TK1 in host mode by default. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use proper tuple notationThierry Reding
Tuple boundaries should be marked by < and > to make it clear which cells are part of the same tuple. This also helps the json-schema based validation tooling to properly parse this data. While at it, also remove the "immovable" bit from PCI addresses. All of these addresses are in fact "movable". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Use standard name for Ethernet devicesThierry Reding
Ethernet device should be named "ethernet@<unit-address>". Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #sound-dai-cells property to codecsThierry Reding
Audio codecs need a #sound-dai-cells property, so add one to the audio codecs on various Tegra-based boards that don't have one. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Add missing #phy-cells property to USB PHYsThierry Reding
USB PHYs must have a #phy-cells property, so add one to the Tegra USB PHYs which don't have one. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Tegra114 SDHCI is not backwards-compatibleThierry Reding
The SDHCI controller instantiated on Tegra114 is not backwards- compatible with the version on Tegra30, so remove the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Rename sdhci nodes to mmcThierry Reding
The new json-schema based validation tools require SD/MMC controller nodes to be named mmc. Rename all references to them. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Philippe Schenker <philippe.schenker@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-25ARM: tegra: Drop display controller parent clocks on Tegra124Thierry Reding
The parent clocks are determined by the output that will be used, not by the display controller that drives the output. On previous generations a simple RGB output used to be part of the display controller and hence an explicit parent clock needed to be assigned to the display controller to drive the RGB output. Starting with Tegra124, that RGB output has been dropped and the parent clock can therefore be removed from the display controller device tree nodes. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-24ARM: vdso: Don't use gcc plugins for building vgettimeofday.cAlexander Popov
Don't use gcc plugins for building arch/arm/vdso/vgettimeofday.c to avoid unneeded instrumentation. As previously discussed[1]: arm_ssp_per_task_plugin.c 32-bit ARM only (but likely needs disabling for 32-bit ARM vDSO?) cyc_complexity_plugin.c compile-time reporting only latent_entropy_plugin.c this shouldn't get triggered for the vDSO (no __latent_entropy nor __init attributes in vDSO), but perhaps explicitly disabling it would be a sensible thing to do, just for robustness? randomize_layout_plugin.c this shouldn't get triggered (again, lacking attributes), but should likely be disabled too. sancov_plugin.c This should be tracking the KCOV directly (see scripts/Makefile.kcov), which is already disabled here. structleak_plugin.c This should be fine in the vDSO, but there's no security boundary here, so it wouldn't be important to KEEP it enabled. [1] https://lore.kernel.org/lkml/20200610073046.GA15939@willie-the-truck/ Signed-off-by: Alexander Popov <alex.popov@linux.com> Link: https://lore.kernel.org/r/20200624123330.83226-3-alex.popov@linux.com Signed-off-by: Kees Cook <keescook@chromium.org>
2020-06-24ARM: imx6: add missing put_device() call in imx6q_suspend_init()yu kuai
if of_find_device_by_node() succeed, imx6q_suspend_init() doesn't have a corresponding put_device(). Thus add a jump target to fix the exception handling for this function implementation. Signed-off-by: yu kuai <yukuai3@huawei.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-24ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()yu kuai
if of_find_device_by_node() succeed, imx_suspend_alloc_ocram() doesn't have a corresponding put_device(). Thus add a jump target to fix the exception handling for this function implementation. Fixes: 1579c7b9fe01 ("ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.") Signed-off-by: yu kuai <yukuai3@huawei.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23ARM: tegra: The Tegra114 DC is not backwards-compatibleThierry Reding
The display controller on Tegra114 is in fact not backwards-compatible with the instantiation found on earlier SoCs. Drop the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: gr3d is not backwards-compatibleThierry Reding
The instantiation of gr3d in Tegra114 is not backwards-compatible with the version found on earlier chips. Remove the misleading compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: gr2d is not backwards-compatibleThierry Reding
The instantiation of gr2d in Tegra114 is not backwards-compatible with the version found on earlier chips. While the hardware IP is identical, the compatible string also describes the integration of the IP, which in the case of Tegra114 is slightly different in that it's part of the HEG power partition, whereas it wasn't previously. Drop the misleading compatible string so that drivers that support the older integrations cannot match on it. Since they wouldn't be able to control the power partition, such driver wouldn't be able to access any of the registers of the IP. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Add missing host1x propertiesThierry Reding
The host1x device tree bindings require the clock- and interrupt-names properties to be present, so add them where missing. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Do not mark host1x as simple busThierry Reding
The host1x is not a simple bus, so drop the corresponding compatible string. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: tn7: Use the correct DSI/CSI supplyThierry Reding
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use that instead of the wrong vdd-supply property. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: roth: Use the correct DSI/CSI supplyThierry Reding
The correct DSI/CSI supply property is called vdd-dsi-csi-supply, so use that instead of the wrong vdd-supply property. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Remove battery-name propertyThierry Reding
This property is not documented and will cause a validation failure. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Remove simple regulators busThierry Reding
The standard way to do this is to list out the regulators at the top level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Remove simple clocks busThierry Reding
The standard way to do this is to list out the clocks at the top-level. Adopt the standard way to fix validation. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: tegra: Add missing clock-names for SDHCI on Tegra114Thierry Reding
The Tegra SDHCI controller bindings state that the clock-names property is required, so add the missing properties on Tegra114. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23ARM: exynos: clear L310_AUX_CTRL_FULL_LINE_ZERO in default l2c_aux_valGuillaume Tucker
This "alert" error message can be seen on exynos4412-odroidx2: L2C: platform modifies aux control register: 0x02070000 -> 0x3e470001 L2C: platform provided aux values permit register corruption. Followed by this plain error message: L2C-310: enabling full line of zeros but not enabled in Cortex-A9 To fix it, don't set the L310_AUX_CTRL_FULL_LINE_ZERO flag (bit 0) in the default value of l2c_aux_val. It may instead be enabled when applicable by the logic in l2c310_enable() if the attribute "arm,full-line-zero-disable" was set in the device tree. The initial commit that introduced this default value was in v2.6.38 commit 1cf0eb799759 ("ARM: S5PV310: Add L2 cache init function in cpu.c"). However, the code to set the L310_AUX_CTRL_FULL_LINE_ZERO flag and manage that feature was added much later and the default value was not updated then. So this seems to have been a subtle oversight especially since enabling it only in the cache and not in the A9 core doesn't actually prevent the platform from running. According to the TRM, the opposite would be a real issue, if the feature was enabled in the A9 core but not in the cache controller. Reported-by: "kernelci.org bot" <bot@kernelci.org> Signed-off-by: Guillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-06-23ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drainFrieder Schrempf
The WDOG_ANY signal is connected to the RESET_IN signal of the SoM and baseboard. It is currently configured as push-pull, which means that if some external device like a programmer wants to assert the RESET_IN signal by pulling it to ground, it drives against the high level WDOG_ANY output of the SoC. To fix this we set the WDOG_ANY signal to open-drain configuration. That way we make sure that the RESET_IN can be asserted by the watchdog as well as by external devices. Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards") Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoMFrieder Schrempf
The watchdog's WDOG_ANY signal is used to trigger a POR of the SoC, if a soft reset is issued. As the SoM hardware connects the WDOG_ANY and the POR signals, the watchdog node itself and the pin configuration should be part of the common SoM devicetree. Let's move it from the baseboard's devicetree to its proper place. Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards") Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-21ARM: dts: qcom: add qfprom definition to ipq806xJonathan McDowell
Add missing qfprom definition for ipq806x SoC Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20200616171554.GA5632@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-06-20ARM/orion/gpio: Make use of for_each_requested_gpio()Andy Shevchenko
Make use of for_each_requested_gpio() instead of home grown analogue. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Gregory Clement <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20200615150545.87964-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-06-18maccess: make get_kernel_nofault() check for minimal type compatibilityLinus Torvalds
Now that we've renamed probe_kernel_address() to get_kernel_nofault() and made it look and behave more in line with get_user(), some of the subtle type behavior differences end up being more obvious and possibly dangerous. When you do get_user(val, user_ptr); the type of the access comes from the "user_ptr" part, and the above basically acts as val = *user_ptr; by design (except, of course, for the fact that the actual dereference is done with a user access). Note how in the above case, the type of the end result comes from the pointer argument, and then the value is cast to the type of 'val' as part of the assignment. So the type of the pointer is ultimately the more important type both for the access itself. But 'get_kernel_nofault()' may now _look_ similar, but it behaves very differently. When you do get_kernel_nofault(val, kernel_ptr); it behaves like val = *(typeof(val) *)kernel_ptr; except, of course, for the fact that the actual dereference is done with exception handling so that a faulting access is suppressed and returned as the error code. But note how different the casting behavior of the two superficially similar accesses are: one does the actual access in the size of the type the pointer points to, while the other does the access in the size of the target, and ignores the pointer type entirely. Actually changing get_kernel_nofault() to act like get_user() is almost certainly the right thing to do eventually, but in the meantime this patch adds logit to at least verify that the pointer type is compatible with the type of the result. In many cases, this involves just casting the pointer to 'void *' to make it obvious that the type of the pointer is not the important part. It's not how 'get_user()' acts, but at least the behavioral difference is now obvious and explicit. Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-06-18maccess: rename probe_kernel_address to get_kernel_nofaultChristoph Hellwig
Better describe what this helper does, and match the naming of copy_from_kernel_nofault. Also switch the argument order around, so that it acts and looks like get_user(). Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-06-17ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 linesCodrin Ciubotariu
The L1 and L3 lines drive NMOS transistors that are OFF with a low level. On the SAM9X60 EK board, if the pins corresponding to L1 and L3 have pull-ups enabled, there is an extra 2 x 30uA power consumption. Use pull-downs for these 2 lines to remove the unnecessary power consumption. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200615095525.43414-2-codrin.ciubotariu@microchip.com
2020-06-17ARM: dts: at91: sama5d2_xplained: classd: pull-down the R1 and R3 linesCodrin Ciubotariu
The R1 and R3 lines drive NMOS transistors that are OFF with a low level. On the SAMA5D2 Xplained board, if the pins corresponding to R1 and R3 have pull-ups enabled, there is an extra 2 x 30uA power consumption. Use pull-downs for these 2 lines to remove the unnecessary power consumption. Fixes: b133ca7a653c ("ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200615095525.43414-1-codrin.ciubotariu@microchip.com
2020-06-17ARM: dts: NSP: Correct FA2 mailbox nodeMatthew Hagan
The FA2 mailbox is specified at 0x18025000 but should actually be 0x18025c00, length 0x400 according to socregs_nsp.h and board_bu.c. Also the interrupt was off by one and should be GIC SPI 151 instead of 150. Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP") Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2020-06-17maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofaultChristoph Hellwig
Better describe what these functions do. Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-06-17efi/libstub: arm: Print CPU boot mode and MMU state at bootArd Biesheuvel
On 32-bit ARM, we may boot at HYP mode, or with the MMU and caches off (or both), even though the EFI spec does not actually support this. While booting at HYP mode is something we might tolerate, fiddling with the caches is a more serious issue, as disabling the caches is tricky to do safely from C code, and running without the Dcache makes it impossible to support unaligned memory accesses, which is another explicit requirement imposed by the EFI spec. So take note of the CPU mode and MMU state in the EFI stub diagnostic output so that we can easily diagnose any issues that may arise from this. E.g., EFI stub: Entering in SVC mode with MMU enabled Also, capture the CPSR and SCTLR system register values at EFI stub entry, and after ExitBootServices() returns, and check whether the MMU and Dcache were disabled at any point. If this is the case, a diagnostic message like the following will be emitted: efi: [Firmware Bug]: EFI stub was entered with MMU and Dcache disabled, please fix your firmware! efi: CPSR at EFI stub entry : 0x600001d3 efi: SCTLR at EFI stub entry : 0x00c51838 efi: CPSR after ExitBootServices() : 0x600001d3 efi: SCTLR after ExitBootServices(): 0x00c50838 Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <leif@nuviainc.com>
2020-06-17ARM: dts: rockchip: Add marvell BT irq configAbhishek Pandit-Subedi
Veyron Jaq and Mighty both use the Marvel 8897 WiFi+BT chip. Add wakeup and pinctrl block to devicetree so the btmrvl driver can correctly configure the wakeup interrupt. Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200612130219.v2.1.I66864be898aa835ccb66b6cd5220d0b082338a81@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2020-06-17ARM: dts: rockchip: rename label and nodename pinctrl subnodes that end with ↵Johan Jonker
gpio A test with the command below gives for example this error: arch/arm/boot/dts/rk3288-tinker.dt.yaml: tsadc: otp-gpio: {'phandle': [[54]], 'rockchip,pins': [[0, 10, 0, 118]]} is not of type 'array' 'gpio' is a sort of reserved nodename and should not be used for pinctrl in combination with 'rockchip,pins', so change nodes that end with 'gpio' to end with 'pin' or 'pins'. make ARCH=arm dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ dtschema/schemas/gpio/gpio.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200524160636.16547-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>