summaryrefslogtreecommitdiff
path: root/arch/arm
AgeCommit message (Collapse)Author
2021-01-25ARM: dts: bcm2711: Add reserved memory template to hold firmware configurationNicolas Saenz Julienne
RPi4's co-processor will copy the board's bootloader[1] configuration into memory for the OS to consume. Specifically, for the bootloader configuration and upgrade user-space routines to query it through nvmem's sysfs interface. Introduce a reserved-memory area template for the co-processor to edit before booting the system so as for Linux not to overwrite that memory and to expose it as an nvmem device. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Tested-by: Tim Gover <tim.gover@raspberrypi.com> Link: https://lore.kernel.org/r/e8ca9365-a1f2-1f9d-377c-13bf97883cce@linaro.org [1] https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2711_bootloader_config.md
2021-01-25ARM: dts: bcm2711: Use compatible string for BCM2711 DSI1Dave Stevenson
Updates the compatible string for DSI1 on BCM2711 to differentiate it from BCM2835. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20201203132543.861591-9-maxime@cerno.tech
2021-01-25ARM: dts: meson8b: add the thermal-zones with cooling configurationMartin Blumenstingl
The vendor kernel uses the following thermal-zone settings: <= 70°C: - CPU frequency limited to 1.488GHz - GPU limited to 511MHz and 2 cores (pixel processors) <= 80°C: - CPU frequency limited to 1.2GHz - GPU limited to 435MHz and 2 cores (pixel processors) <= 90°C: - CPU frequency limited to 0.804GHz - GPU limited to 328MHz and 1 core (pixel processor) Add simplified thermal configuration which is taken from the GXBB/GXL/GXM SoC family (which uses the same manufacturing process and has the same maximum junction temperature of 125°C). With this the thermal framework will try to keep the SoC temperature at or below 80°C which is identical to the vendor kernel (with the exception of one CPU frequency step from 1.488GHz to 1.536GHz). The number of GPU cores are not taken into account as this is not supported. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201221181306.904272-5-martin.blumenstingl@googlemail.com
2021-01-25ARM: dts: meson8: add the thermal-zones with cooling configurationMartin Blumenstingl
The vendor kernel uses the following thermal-zone settings: <= 70°C: - CPU frequency limited to 1.608GHz - GPU limited to 511MHz and 5 cores (pixel processors) <= 80°C: - CPU frequency limited to 1.2GHz - GPU limited to 435MHz and 4 cores (pixel processors) <= 90°C: - CPU frequency limited to 0.804GHz - GPU limited to 328MHz and 3 cores (pixel processors) Add simplified thermal configuration which is taken from the GXBB/GXL/GXM SoC family (which uses the same manufacturing process and has the same maximum junction temperature of 125°C). With this the thermal framework will try to keep the SoC temperature at or below 80°C which is identical to the vendor kernel (with the exception of one GPU pixel processor). The number of GPU cores are not taken into account as this is not supported. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201221181306.904272-4-martin.blumenstingl@googlemail.com
2021-01-25ARM: dts: meson: add the ADC thermal sensor to meson.dtsiMartin Blumenstingl
The SoC temperature can be retrieved from ADC channel 8 on all 32-bit SoCs (Meson6, Meson8, Meson8b and Meson8m2). Add a "generic-adc-thermal" instance to meson.dtsi so the thermal sensor is available for all SoCs. If the temperature sensor calibration data is missing for a board then the "generic-adc-thermal" will not probe and not register a thermal sensor. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201221181306.904272-3-martin.blumenstingl@googlemail.com
2021-01-25ARM: dts: meson: move iio-hwmon for the SoC temperature to meson.dtsiMartin Blumenstingl
The SoC temperature can be retrieved from ADC channel 8 on all 32-bit SoCs (Meson6, Meson8, Meson8b and Meson8m2). Move the iio-hwmon instance to meson.dtsi instead of duplicating it in all board.dts. If the temperature sensor calibration data is missing for a board then iio-hwmon will simply not probe. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201221181306.904272-2-martin.blumenstingl@googlemail.com
2021-01-25ARM: multi_v7_defconfig: Enable support for the ADC thermal sensorMartin Blumenstingl
32-bit Amlogic Meson platforms are using a special ADC channel to read the SoC temperature. Enable the "generic ADC thermal" driver so this data can be used to cool the SoC for example by reduing the maximum CPU and GPU frequencies temporarily. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20201221181306.904272-6-martin.blumenstingl@googlemail.com
2021-01-25ARM: dts: qcom: ipq4019: add SDHCI VQMMC LDO nodeRobert Marko
Since we now have driver for the SDHCI VQMMC LDO needed for I/0 voltage levels lets introduce the necessary node for it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200907101937.10155-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-25ARM: dts: stm32: Rename mmc controller nodes to mmc@Marek Vasut
Per mmc-controller.yaml, the node pattern is "^mmc(@.*)?$" , so adjust the node. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: devicetree@vger.kernel.org Acked-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25ARM: dts: stm32: Enable voltage translator auto-detection on DHCOMMarek Vasut
The DHCOM SoM uSD slot has an optional voltage level translator, add DT bindings which permit the MMCI driver to detect the translator automatically. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25ARM: dts: stm32: Add additional init state for SDMMC1 pinsMarek Vasut
Add "init" mux option for SDMMC1, where the CMD, CK, CKIN lines are not configured, so they can be claimed as GPIOs early on in driver probe(). This is used for probing optional voltage level translator. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Ludovic Barre <ludovic.barre@st.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-01-25Merge v5.11-rc5 into usb-nextGreg Kroah-Hartman
We need the fixes in here and this resolves a merge issue with drivers/usb/gadget/udc/bdc/Kconfig. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-01-25ARM: dts: omap4-droid4: Fix lost keypad slide interrupts for droid4Tony Lindgren
We may lose edge interrupts for gpio banks other than the first gpio bank as they are not always powered. Instead, we must use the padconf interrupt as that is always powered. Note that we still also use the gpio for reading the pin state as that can't be done with the padconf device. Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-01-24arm: dts: keystone: Harmonize DWC USB3 DT nodes nameSerge Semin
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-24arm: dts: keystone: Correct DWC USB3 compatible stringSerge Semin
Syonpsys IP cores are supposed to be defined with "snps" vendor-prefix. Use it instead of the deprecated "synopsys" one. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2021-01-25Merge tag 'v5.11-rc5' of ↵Dave Airlie
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next Backmerge v5.11-rc5 into drm-next to clean up a bunch of conflicts we are dragging around. Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-01-24fs: add mount_setattr()Christian Brauner
This implements the missing mount_setattr() syscall. While the new mount api allows to change the properties of a superblock there is currently no way to change the properties of a mount or a mount tree using file descriptors which the new mount api is based on. In addition the old mount api has the restriction that mount options cannot be applied recursively. This hasn't changed since changing mount options on a per-mount basis was implemented in [1] and has been a frequent request not just for convenience but also for security reasons. The legacy mount syscall is unable to accommodate this behavior without introducing a whole new set of flags because MS_REC | MS_REMOUNT | MS_BIND | MS_RDONLY | MS_NOEXEC | [...] only apply the mount option to the topmost mount. Changing MS_REC to apply to the whole mount tree would mean introducing a significant uapi change and would likely cause significant regressions. The new mount_setattr() syscall allows to recursively clear and set mount options in one shot. Multiple calls to change mount options requesting the same changes are idempotent: int mount_setattr(int dfd, const char *path, unsigned flags, struct mount_attr *uattr, size_t usize); Flags to modify path resolution behavior are specified in the @flags argument. Currently, AT_EMPTY_PATH, AT_RECURSIVE, AT_SYMLINK_NOFOLLOW, and AT_NO_AUTOMOUNT are supported. If useful, additional lookup flags to restrict path resolution as introduced with openat2() might be supported in the future. The mount_setattr() syscall can be expected to grow over time and is designed with extensibility in mind. It follows the extensible syscall pattern we have used with other syscalls such as openat2(), clone3(), sched_{set,get}attr(), and others. The set of mount options is passed in the uapi struct mount_attr which currently has the following layout: struct mount_attr { __u64 attr_set; __u64 attr_clr; __u64 propagation; __u64 userns_fd; }; The @attr_set and @attr_clr members are used to clear and set mount options. This way a user can e.g. request that a set of flags is to be raised such as turning mounts readonly by raising MOUNT_ATTR_RDONLY in @attr_set while at the same time requesting that another set of flags is to be lowered such as removing noexec from a mount tree by specifying MOUNT_ATTR_NOEXEC in @attr_clr. Note, since the MOUNT_ATTR_<atime> values are an enum starting from 0, not a bitmap, users wanting to transition to a different atime setting cannot simply specify the atime setting in @attr_set, but must also specify MOUNT_ATTR__ATIME in the @attr_clr field. So we ensure that MOUNT_ATTR__ATIME can't be partially set in @attr_clr and that @attr_set can't have any atime bits set if MOUNT_ATTR__ATIME isn't set in @attr_clr. The @propagation field lets callers specify the propagation type of a mount tree. Propagation is a single property that has four different settings and as such is not really a flag argument but an enum. Specifically, it would be unclear what setting and clearing propagation settings in combination would amount to. The legacy mount() syscall thus forbids the combination of multiple propagation settings too. The goal is to keep the semantics of mount propagation somewhat simple as they are overly complex as it is. The @userns_fd field lets user specify a user namespace whose idmapping becomes the idmapping of the mount. This is implemented and explained in detail in the next patch. [1]: commit 2e4b7fcd9260 ("[PATCH] r/o bind mounts: honor mount writer counts at remount") Link: https://lore.kernel.org/r/20210121131959.646623-35-christian.brauner@ubuntu.com Cc: David Howells <dhowells@redhat.com> Cc: Aleksa Sarai <cyphar@cyphar.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: linux-fsdevel@vger.kernel.org Cc: linux-api@vger.kernel.org Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Christian Brauner <christian.brauner@ubuntu.com>
2021-01-22Merge tag 'imx-fixes-5.11-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.11, round 2: - Fix pcf2127 reset for imx7d-flex-concentrator board. - Fix i.MX6 suspend with Thumb-2 kernel. - Fix ethernet-phy address issue on imx6qdl-sr-som board. - Fix GPIO3 `gpio-ranges` on i.MX8MP. - Select SOC_BUS for IMX_SCU driver to fix build issue. * tag 'imx-fixes-5.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: firmware: imx: select SOC_BUS to fix firmware build arm64: dts: imx8mp: Correct the gpio ranges of gpio3 ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms ARM: imx: build suspend-imx6.S with arm instruction set ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset Link: https://lore.kernel.org/r/20210119091949.GD4356@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22ARM: dts: nomadik: Fix up MMC node namesLinus Walleij
Fix the node names for the MMC/SD card controller to conform to the standard node name mmc@.. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20210122222038.2888747-1-linus.walleij@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22Merge tag 'ux500-dts-v5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt Ux500 DTS updates for the v5.12 kernel cycle: - A new DTS file for the Samsung GT-I9070 (Janice) - Fix up ADC channel name attributes - Add charger interrupts - Add thermistors to the HREF boards - Remove the non-existing AB8505 HW ADC IRQ - Push down the VMMCI setting to each board - Add the die temperature channel to teh AB8505 - Fix up the MMC host names to follow the standard naming convention * tag 'ux500-dts-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Fix up MMC host node names ARM: dts: ux500: Add die temperature to AB8505 ARM: dts: ux500: Push VMMCI down to each tree ARM: dts: ux500: Remove the GPADC HW IRQ ARM: dts: ux500: Add thermistors to the HREF ARM: dts: ux500: Add interrupts to charger ARM: dts: ux500: Fix channel names attributes ARM: dts: ux500: Add a device tree for Janice Link: https://lore.kernel.org/r/CACRpkdbn=P63V9aEO2wKu2DwvVUcbjwCEV_JvKwWZ0netT75ig@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22ARM: dts: Fix up MMC host node namesLinus Walleij
The standard mandates that these nodes be named mmc@... not sdi_foo@... Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable Command DB driverManivannan Sadhasivam
Enable Command DB driver to query the shared system resources on platforms using RPMh such as SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-14-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable RPMh power domain driverManivannan Sadhasivam
Enable RPMh power domain driver to support power-domains on platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-13-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable ARM PSCI supportManivannan Sadhasivam
Enable ARM Power State Coordination Interface (PSCI) support on Qualcomm platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-12-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable watchdog driverManivannan Sadhasivam
Enable watchdog driver for Qualcomm platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-11-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable RPMh regulatorManivannan Sadhasivam
Enable RPMh regulator for using with platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-10-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable ARM SMMUManivannan Sadhasivam
Enable ARM SMMU driver for using with platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-9-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable DWC3 controller and PHYsManivannan Sadhasivam
Enable DWC3 controller, QMP PHY and SNPS HS PHY for using with platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-8-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: replace status value "ok" by "okay"Adrian Schmutzler
While the DT parser recognizes "ok" as a valid value for the "status" property, it is actually mentioned nowhere. Use the proper value "okay" instead, as done in the majority of files already. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200830191643.20717-1-freifunk@adrianschmutzler.de [bjorn: Rebased and included fixup of sdx55-mtp] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add additional DT labels in qcom-ipq8064.dtsiAdrian Schmutzler
This adds some additional DT labels which are handy when referring to the nodes in derived DTS(I) files. It will also make the definitions more consistent, e.g. by adding gsbi2_serial and gsbi5_serial where we previously "only" had gsbi4_serial defined. While at it, add missing spaces after some DT labels and remove one useless empty line. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200902165159.7733-1-freifunk@adrianschmutzler.de Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: remove commented mmc-ddr-1_8v for sdcc3Adrian Schmutzler
This property appears to be commented out, so we can remove it as well. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Link: https://lore.kernel.org/r/20200902165159.7733-2-freifunk@adrianschmutzler.de Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add Alfa Network AP120C-ACRobert Marko
ALFA Network AP120C-AC is a dual-band ceiling AP, based on Qualcomm IPQ4018 + QCA8075 platform. Specification: - Qualcomm IPQ4018 (717 MHz) - 256 MB of RAM (DDR3) - 16 MB (SPI NOR) + 128 or 512 MB (SPI NAND) of flash - 2x Gbps Ethernet, with 802.3af PoE support in one port - 2T2R 2.4/5 GHz (IPQ4018), with ext. FEMs (QFE1952, QFE1922) - 3x U.FL connectors - 1x 1.8 dBi (Bluetooth) and 2x 3/5 dBi dual-band (Wi-Fi) antennas - Atmel/Microchip AT97SC3205T TPM module (I2C bus) - TI CC2540 Bluetooth LE module (USB 2.0 bus) - 1x button (reset) - 1x USB 2.0 - DC jack for main power input (12 V) - UART header available on PCB (2.0 mm pitch) This adds DTS for both the generic and custom Bit edition for Sartura. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-4-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add 8devices JalapenoRobert Marko
8devices Jalapeno is a dual-band SoM, based on Qualcomm IPQ4018 + QCA8072 platform. Specification: QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz 256 MB of DDR3 RAM 8 MB of SPI NOR flash 128 MB of Winbond SPI NAND flash WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2 WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2 ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN) Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: ipq4019: add more labelsRobert Marko
Lets add labels to more commonly used nodes for easier modification in board DTS files. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: ipq4019: add USB devicetree nodesJohn Crispin
Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hr Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: add prng definition to ipq806xJonathan McDowell
Add missing prng definition for ipq806x SoC Signed-off-by: Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.li Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable UBI file systemManivannan Sadhasivam
Enable UBI file system support. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable MTD UBI driverManivannan Sadhasivam
Enable MTD UBI driver for using partitions on top of NAND flash in platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable SMEM partition parserManivannan Sadhasivam
Enable Qcom SMEM partition parser driver to make use of the NAND partitions defined in Shared Memory (SMEM). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-5-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable SDX55 GCC driverManivannan Sadhasivam
Enable Qcom SDX55 GCC driver for clock support. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable SDX55 pinctrl driverManivannan Sadhasivam
Enable the Qcom SDX55 pinctrl driver and also enable the PINCTRL_MSM driver explicitly since it is not selected by default directly. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-3-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: qcom_defconfig: Enable RPMh driversManivannan Sadhasivam
Enable Qcom RPMh drivers for using it in platforms like SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118053853.56224-2-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add pshold supportManivannan Sadhasivam
Add support for pshold block to drive pshold towards the PMIC, which is used to trigger a configurable event such as reboot or poweroff of the SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add Watchdog supportManivannan Sadhasivam
Enable Watchdog support for Application Processor Subsystem (APSS) block on SDX55 platform. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55-mtp: Enable USB3 and PHY supportManivannan Sadhasivam
Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: dts: qcom: sdx55: Add USB3 and PHY supportManivannan Sadhasivam
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on SDX55. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org [bjorn: Added missing #power-domain-cells to &gcc] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-22ARM: mstar: Unify common parts of BreadBee boards into a dtsiDaniel Palmer
The BreadBee and the BreadBee Crust are the same PCB with a different SoC mounted. There are two top level dts to handle this. To avoid deduplicating the parts that are more related to the PCB than the SoC (i.e. the voltage regs and LEDs) add a common dtsi that can be included in both top level dts. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20201224020354.2212037-1-daniel@0x0f.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22Merge tag 'at91-dt-5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt AT91 DT for 5.12: - removing a property never documented nor used - adding i2c recovery GPI for one more board * tag 'at91-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d2: remove atmel,wakeup-type references ARM: dts: at91-sama5d27_wlsom1: add i2c recovery Link: https://lore.kernel.org/r/20210122145056.171283-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22Merge tag 'at91-defconfig-5.12' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/defconfig AT91 defconfig for 5.12: - remove ATMEL_TCLIB as the driver was deleted * tag 'at91-defconfig-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: configs: multi_{v5,v7}: remove ATMEL_TCLIB ARM: configs: at91: remove ATMEL_TCLIB Link: https://lore.kernel.org/r/20210122144638.170565-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-22ARM: multi_v7_defconfig: Enable Actions Semi platform and driversManivannan Sadhasivam
The support for Actions Semi ARM32 platform has matured enough in the mainline. So let's enable it in multi_v7_defconfig along with the relevant drivers. The platform can now boot a distro from eMMC or uSD without any out of tree patch. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210121061447.26517-1-manivannan.sadhasivam@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>