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2020-11-19ARM: dts: Configure power domain for omap5 dssTony Lindgren
This allows shutting down dss domain when the screen blanks. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: omap5: add remaining PRM instancesTero Kristo
Add remaining PRM instances for the omap5 SoC. Additionally enable the genpd support for them. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Drop legacy platform data for dra7 gpmcTony Lindgren
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: Configure interconnect target module for dra7 ivaTony Lindgren
We can now probe devices with device tree only configuration using ti-sysc interconnect target module driver. Cc: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: dra7: add remaining PRM instancesTero Kristo
Add remaining PRM instances for the dra7 SoC. Additionally enable the genpd support for them. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Drop legacy platform data for omap4 gpmcTony Lindgren
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. Cc: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Drop legacy platform data for omap4 ivaTony Lindgren
We can now probe devices with ti-sysc interconnect driver and dts data. Let's drop the related platform data and custom ti,hwmods dts property. Cc: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: Configure power domain for omap4 dspTony Lindgren
This allows shutting down the dsp domain when not in use. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: Configure power domain for omap4 dssTony Lindgren
This allows shutting down dss domain when the screen blanks. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: omap4: add remaining PRM instancesTero Kristo
Add remaining PRM instances for the omap4 SoC. Additionally enable the genpd support for them. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: aspeed: ast2600evb: Add MAC0Joel Stanley
MAC0 was not functional in the AST2600A0 SoC. This has been resolved with the A1, so allow use of this port on EVBs with the A1 and subsequent revisions. A0 EVBs will still boot with this change, but the first Ethernet device will not be functional. Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: aspeed: rainier: Don't shout addressesAndrew Jeffery
Make them lowercase. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201002063414.275161-4-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: aspeed: rainier: Mark FSI SPI controllers as restrictedEddie James
Some of the FSI-attached SPI controllers can't use the loop command due to security requirements. Indicate this in the devicetree with the restricted compatible string. Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20201102194713.14812-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: OMAP1: clock: Use IS_ERR_OR_NULL() to clean codeTang Bin
Use IS_ERR_OR_NULL() to make the code cleaner. Signed-off-by: Zhang Shengju <zhangshengju@cmss.chinamobile.com> Signed-off-by: Tang Bin <tangbin@cmss.chinamobile.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Remove redundant null check before ↵Xu Wang
clk_prepare_enable/clk_disable_unprepare Because clk_prepare_enable() and clk_disable_unprepare() already checked NULL clock parameter, so the additional checks are unnecessary, just remove them. Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Remove redundant assignment to variable retJing Xiangfeng
The variable ret has been initialized with '-ENOMEM'. The assignment in the if branch is redundant. So remove it. Signed-off-by: Jing Xiangfeng <jingxiangfeng@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Fix kfree NULL pointer in omap2xxx_clkt_vps_initYouling Tang
The returns pointer is NULL when kzalloc fails to apply for space, so fix kfree NULL pointer. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: OMAP2+: Fix memleak in omap2xxx_clkt_vps_initYouling Tang
If the clk_register fails, we should free hw before function returns to prevent memleak. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: dra76x: m_can: fix order of clocksMarc Kleine-Budde
According to the bosch,m_can.yaml bindings the first clock shall be the "hclk", while the second clock "cclk". This patch fixes the order accordingly. Fixes: 0adbe832f21a ("ARM: dts: dra76x: Add MCAN node") Cc: Faiz Abbas <faiz_abbas@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-11-19ARM: dts: nuvoton: Add Fii Kudo systemLancelot Kao
Add device tree for the Kudo BMC. Kudo is an Ampere (Altra) server platform manufactured by Fii and is based on a Nuvoton NPCM730 SoC. Signed-off-by: Mustatfa Shehabi <Mustafa.Shehabi@fii-na.com> Signed-off-by: Mohaimen alsmarai <Mohaimen.alsamarai@fii-na.com> Signed-off-by: Lancelot Kao <lancelot.kao@fii-usa.com> Reviewed-by: Vivekanand Veeracholan <vveerach@google.com> Reviewed-by: Benjamin Fair <benjaminfair@google.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201116232127.7066-1-lancelot.kao@fii-usa.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: nuvoton: Add NPCM7xx RunBMC Olympus Quanta machineTomer Maimon
Add Nuvoton NPCM7xx RunBMC Olympus Quanta board device tree. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: nuvoton: Add Quanta GSJ BMCFran Hsu
The Quanta GSJ BMC uses the Nuvoton NPCM730 SoC. Included features: 1. Image partitions 2. PWM fan controller 3. USB device 4. Serial port 5. FIU 6. LEDs and GPIOs Signed-off-by: Fran Hsu <Fran.Hsu@quantatw.com> Reviewed-by: Benjamin Fair <benjaminfair@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: nuvoton: Add Quanta GSJ BMC pinctrlFran Hsu
Add pinctrl definition for the Quanta GSJ BMC machine. Signed-off-by: Fran Hsu <Fran.Hsu@quantatw.com> Reviewed-by: Benjamin Fair <benjaminfair@google.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: nuvoton: Add Nuvoton NPCM730 device treeTomer Maimon
The Nuvoton NPCN730 SoC is a part of the Nuvoton NPCM7xx SoCs family. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: tacoma: Add reserved memory for ramoopsAndrew Jeffery
Reserve a 1.5MiB region of memory to record kmsg dumps, console and userspace message state into 16kiB ring-buffer slots. The sizing allows for up to 16 dumps to be captured and read out. Set max-reason to KMSG_DUMP_EMERG to capture bad-path reboots. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201022014731.2035438-7-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: rainier: Add reserved memory for ramoopsAndrew Jeffery
Reserve a 1.5MiB region of memory to record kmsg dumps, console and userspace message state into 16kiB ring-buffer slots. The sizing allows for up to 16 dumps to be captured and read out. Set max-reason to KMSG_DUMP_EMERG to capture bad-path reboots. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201022014731.2035438-6-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-19ARM: dts: tacoma: Fix node vs reg mismatch for flash memoryAndrew Jeffery
The mismatch lead to a miscalculation of regions in another patch, and shouldn't be mismatched anyway, so make them consistent. Fixes: 575640201e66 ("ARM: dts: aspeed: tacoma: Use 64MB for firmware memory") Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20201022014731.2035438-2-andrew@aj.id.au Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-18dma-mapping: remove the dma_direct_set_offset exportChristoph Hellwig
Drop the dma_direct_set_offset export and move the declaration to dma-map-ops.h now that the Allwinner drivers have stopped calling it. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
2020-11-17Input: atmel_mxt_ts - fix up inverted RESET handlerLinus Walleij
This driver uses GPIO descriptors to drive the touchscreen RESET line. In the existing device trees this has in conflict with intution been flagged as GPIO_ACTIVE_HIGH and the driver then applies the reverse action by driving the line low (setting to 0) to enter reset state and driving the line high (setting to 1) to get out of reset state. The correct way to handle active low GPIO lines is to provide the GPIO_ACTIVE_LOW in the device tree (thus properly describing the hardware) and letting the GPIO framework invert the assertion (driving high) to a low level and vice versa. This is considered a bug since the device trees are incorrectly mis-specifying the line as active high. Fix the driver and all device trees specifying a reset line. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201104153032.1387747-1-linus.walleij@linaro.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2020-11-17net: wan: Delete the DLCI / SDLA driversXie He
The DLCI driver (dlci.c) implements the Frame Relay protocol. However, we already have another newer and better implementation of Frame Relay provided by the HDLC_FR driver (hdlc_fr.c). The DLCI driver's implementation of Frame Relay is used by only one hardware driver in the kernel - the SDLA driver (sdla.c). The SDLA driver provides Frame Relay support for the Sangoma S50x devices. However, the vendor provides their own driver (along with their own multi-WAN-protocol implementations including Frame Relay), called WANPIPE. I believe most users of the hardware would use the vendor-provided WANPIPE driver instead. (The WANPIPE driver was even once in the kernel, but was deleted in commit 8db60bcf3021 ("[WAN]: Remove broken and unmaintained Sangoma drivers.") because the vendor no longer updated the in-kernel WANPIPE driver.) Cc: Mike McLagan <mike.mclagan@linux.org> Signed-off-by: Xie He <xie.he.0141@gmail.com> Link: https://lore.kernel.org/r/20201114150921.685594-1-xie.he.0141@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-11-17ARM: dts: s5pv210: Drop unneeded io-channel-ranges property in AriesJonathan Cameron
This property is only useful if a node has children as it allows them to then use io-channel properties in the parent. Here there are no children. This is harmless, but we are planning to shortly drop this property as it is rarely used correctly and there is little reason it would ever be needed as we can just provide the io-channels property to any child nodes that need it. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20201115192951.1073632-8-jic23@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-17ARM: dts: s5pv210: Drop incorrect use of io-channel-ranges propertyJonathan Cameron
This property is relevant to consumers of io-channels. Here it is used by a provider. dt-schema will now report and error as this property must be in the same node as io-channels and it is not here. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20201115192951.1073632-6-jic23@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-17ARM: dts: exynos: Drop incorrect use of io-channel-rangesJonathan Cameron
This property is only relevant to consumers of io-channels, not providers. All these dtsi files have it alongside #io-channel-cells which indicates they are providers of io-channels, not consumers. Note that dt-schema will now flag this up due to a dependency between this property and io-channels. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20201115192951.1073632-5-jic23@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-18ARM: dts: aspeed: rainier: Add 4U device-treeEddie James
Add a device-tree for the Rainier 4U system. Change the model name on the existing Rainier device-tree to 2U, and remove the two extra power supplies that are only present on the 4U system. Also add labels to the fan nodes for use in the 4U device-tree. Signed-off-by: Eddie James <eajames@linux.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20201028185647.14565-1-eajames@linux.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-17ARM: dts: stm32: Add KS8851 on FMC2 to STM32MP1 DHCOMMarek Vasut
Add bindings for the KS8851 ethernet present on the STM32MP1 DHCOM SoM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17ARM: dts: stm32: Add alternate pinmux for FMC EBI busMarek Vasut
Add another mux option for FMC EBI bus, this is used on DHCOM SoM for the second ethernet and on the PDK2 devkit for SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17ARM: dts: stm32: Connect PHY IRQ line on DH STM32MP1 SoMMarek Vasut
On the production DHCOM STM32MP15xx SoM, the PHY IRQ line is connected to the PI11 pin. Describe it in the DT as well, so the PHY IRQ can be used e.g. to detect cable insertion and removal. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17ARM: dts: stm32: fix DCMI DMA features on stm32mp15 familyHugues Fruchet
Enable FIFO mode with half-full threshold. Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17ARM: dts: nuvoton: Add new device nodes to NPCM750 EVBTomer Maimon
Add the following new device nodes to NPCM750 evolution board device tree: - NPCM7xx Pin controller and GPIO - NPCM7xx PWM and FAN - NPCM7xx EHCI USB - NPCM7xx KCS - NPCM Reset - NPCM Peripheral SPI - NPCM FIU SPI - NPCM HWRNG - NPCM I2C - STMicro STMMAC Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-6-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-17ARM: dts: nuvoton: Add new device nodesTomer Maimon
Add the following new device nodes to NPCM7XX: - NPCM7xx PWM and FAN. - NPCM7xx EHCI USB. - NPCM7xx KCS. - NPCM Reset. - NPCM Peripheral SPI. - NPCM FIU SPI. - NPCM HWRNG. - NPCM I2C. - STMicro STMMAC. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-5-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-17ARM: dts: nuvoton: Add pinctrl and GPIO nodeTomer Maimon
Add pin controller and GPIO node to NPCM7XX device tree. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-4-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-17ARM: dts: nuvoton: Modify timer register sizeTomer Maimon
Modify NPCM7xx device tree timer register size from 0x50 to 0x1C to control only the timer registers and not other hw modules. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-3-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-17ARM: dts: nuvoton: Modify clock parametersTomer Maimon
Modify NPCM7xx device tree clock parameter to clock constants that define at include/dt-bindings/clock/nuvoton,npcm7xx-clock.h file. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20200929131807.15378-2-tmaimon77@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2020-11-16Merge tag 'arm-soc-fixes-v5.10-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Arnd Bergmann: "Around one third of the fixes this time are for dts files that list their ethernet controller as using 'phy-mode="rgmii"' but are changed to 'phy-mode="rgmii-id"' now, because the PHY drivers (realtek, ksz9031, dp83867, ...) now configure the internal delay based on that when they used to stay on the hardware default. The long story is archived at https://lore.kernel.org/netdev/CAMj1kXEEF_Un-4NTaD5iUN0NoZYaJQn-rPediX0S6oRiuVuW-A@mail.gmail.com/ I was trying to hold off on the bugfixes until there was a solution that would avoid breaking all boards, but that does not seem to be happening any time soon, so I am now sending the correct version of the dts files to ensure that at least these machines can use their network devices again. The other changes this time are: - Updating the MAINTAINER lists for Allwinner and Samsung SoCs - Multiple i.MX8MN machines get updates for their CPU operating points to match the data sheet - A revert for a dts patch that caused a regression in USB support on Odroid U3 - Two fixes for the AMD Tee driver, addressing a memory leak and missing locking - Mark the network subsystem on qoriq-fman3 as cache coherent for correctness as better performance. - Minor dts fixes elsewhere, addressing dtc warnings and similar problems" * tag 'arm-soc-fixes-v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits) ARM: dts: exynos: revert "add input clock to CMU in Exynos4412 Odroid" ARM: dts: imx50-evk: Fix the chip select 1 IOMUX arm64: dts: imx8mm: fix voltage for 1.6GHz CPU operating point ARM: dts: stm32: Keep VDDA LDO1 always on on DHCOM ARM: dts: stm32: Enable thermal sensor support on stm32mp15xx-dhcor ARM: dts: stm32: Define VIO regulator supply on DHCOM ARM: dts: stm32: Fix LED5 on STM32MP1 DHCOM PDK2 ARM: dts: stm32: Fix TA3-GPIO-C key on STM32MP1 DHCOM PDK2 arm64: dts: renesas: r8a774e1: Add missing audio_clk_b tee: amdtee: synchronize access to shm list tee: amdtee: fix memory leak due to reset of global shm list arm64: dts: agilex/stratix10: Fix qspi node compatible ARM: dts: imx6q-prti6q: fix PHY address ARM: dts: vf610-zii-dev-rev-b: Fix MDIO over clocking arm: dts: imx6qdl-udoo: fix rgmii phy-mode for ksz9031 phy arm64: dts imx8mn: Remove non-existent USB OTG2 arm64: dts: imx8mm-beacon-som: Fix Choppy BT audio arm64: dts: fsl: DPAA FMan DMA operations are coherent arm64: dts: fsl: fix endianness issue of rcpm arm64: dts: imx8mn-evk: fix missing PMIC's interrupt line pull-up ...
2020-11-16ARM: dts: exynos: add Samsung's Exynos4412-based P4 Note boardsMartin Jücker
The P4 Note family contains a couple of variants of the Galaxy Note 10.1 tablet with mainly different modems. The GT-N8010/GT-N8013 is the WiFi only version. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Link: https://lore.kernel.org/r/20201113212525.13455-3-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-16ARM: exynos_defconfig: compile Atmel MXT touchscreeen as moduleMartin Jücker
The Atmel MXT touchscreen can load firmware and settings from the /lib/firmware directory, it makes sense to have it as a module to have more control over the loading process. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Link: https://lore.kernel.org/r/20201113212525.13455-5-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-16ARM: defconfig: add STMPE ADC driver for P4 NoteMartin Jücker
Enable the STMPE ADC driver for the P4 Note device family in exynos and multi_v7 defconfigs. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Link: https://lore.kernel.org/r/20201113212525.13455-4-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-16ARM: exynos: extend cpuidle support to P4 Note boardsMartin Jücker
The P4 Note family supports cpuidle, so allow it to make use of this feature. Signed-off-by: Martin Jücker <martin.juecker@gmail.com> Link: https://lore.kernel.org/r/20201113212525.13455-6-martin.juecker@gmail.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2020-11-16Merge tag 'imx-fixes-5.10-4' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes i.MX fixes for 5.10, round 4: - Fix MDIO over clocking on vf610-zii-dev-rev-b board to get switch device work reliably. - Fix imx50-evk IOMUX for the chip select 1 to use GPIO4_13 instead of the native CSPI_SSI function. - Fix voltage for 1.6GHz CPU operating point on i.MX8MM to match hardware datasheet. - Fix phy-mode for KSZ9031 PHY on imx6qdl-udoo board. * tag 'imx-fixes-5.10-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx50-evk: Fix the chip select 1 IOMUX arm64: dts: imx8mm: fix voltage for 1.6GHz CPU operating point ARM: dts: vf610-zii-dev-rev-b: Fix MDIO over clocking arm: dts: imx6qdl-udoo: fix rgmii phy-mode for ksz9031 phy Link: https://lore.kernel.org/r/20201116090702.GM5849@dragon Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-16arch: pgtable: define MAX_POSSIBLE_PHYSMEM_BITS where neededArnd Bergmann
Stefan Agner reported a bug when using zsram on 32-bit Arm machines with RAM above the 4GB address boundary: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = a27bd01c [00000000] *pgd=236a0003, *pmd=1ffa64003 Internal error: Oops: 207 [#1] SMP ARM Modules linked in: mdio_bcm_unimac(+) brcmfmac cfg80211 brcmutil raspberrypi_hwmon hci_uart crc32_arm_ce bcm2711_thermal phy_generic genet CPU: 0 PID: 123 Comm: mkfs.ext4 Not tainted 5.9.6 #1 Hardware name: BCM2711 PC is at zs_map_object+0x94/0x338 LR is at zram_bvec_rw.constprop.0+0x330/0xa64 pc : [<c0602b38>] lr : [<c0bda6a0>] psr: 60000013 sp : e376bbe0 ip : 00000000 fp : c1e2921c r10: 00000002 r9 : c1dda730 r8 : 00000000 r7 : e8ff7a00 r6 : 00000000 r5 : 02f9ffa0 r4 : e3710000 r3 : 000fdffe r2 : c1e0ce80 r1 : ebf979a0 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 30c5383d Table: 235c2a80 DAC: fffffffd Process mkfs.ext4 (pid: 123, stack limit = 0x495a22e6) Stack: (0xe376bbe0 to 0xe376c000) As it turns out, zsram needs to know the maximum memory size, which is defined in MAX_PHYSMEM_BITS when CONFIG_SPARSEMEM is set, or in MAX_POSSIBLE_PHYSMEM_BITS on the x86 architecture. The same problem will be hit on all 32-bit architectures that have a physical address space larger than 4GB and happen to not enable sparsemem and include asm/sparsemem.h from asm/pgtable.h. After the initial discussion, I suggested just always defining MAX_POSSIBLE_PHYSMEM_BITS whenever CONFIG_PHYS_ADDR_T_64BIT is set, or provoking a build error otherwise. This addresses all configurations that can currently have this runtime bug, but leaves all other configurations unchanged. I looked up the possible number of bits in source code and datasheets, here is what I found: - on ARC, CONFIG_ARC_HAS_PAE40 controls whether 32 or 40 bits are used - on ARM, CONFIG_LPAE enables 40 bit addressing, without it we never support more than 32 bits, even though supersections in theory allow up to 40 bits as well. - on MIPS, some MIPS32r1 or later chips support 36 bits, and MIPS32r5 XPA supports up to 60 bits in theory, but 40 bits are more than anyone will ever ship - On PowerPC, there are three different implementations of 36 bit addressing, but 32-bit is used without CONFIG_PTE_64BIT - On RISC-V, the normal page table format can support 34 bit addressing. There is no highmem support on RISC-V, so anything above 2GB is unused, but it might be useful to eventually support CONFIG_ZRAM for high pages. Fixes: 61989a80fb3a ("staging: zsmalloc: zsmalloc memory allocation library") Fixes: 02390b87a945 ("mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS") Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Link: https://lore.kernel.org/linux-mm/bdfa44bf1c570b05d6c70898e2bbb0acf234ecdf.1604762181.git.stefan@agner.ch/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>