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2017-06-05ARM: dts: imx7d-sdb: Add Bluetooth supportFabio Estevam
imx7d-sdb has a BCM4339 BT chip connected to UART6. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05ARM: dts: imx7d-sdb: Add Wifi supportFabio Estevam
imx7d-sdb has a BCM4339 Wifi chip connected to USDHC2. Add support for it. While at it, move the WL_REG_ON pin to the correct pinctrl node. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05ARM: dts: imx7d-sdb: Adjust the regulator nodesFabio Estevam
It is not recommended to place the regulator nodes inside 'simple-bus', so adjust them accordingly. The motivation for rearranging this is to make it easier to add new regulator nodes in the future. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05ARM: dts: imx: Fix Ethernet PHY reset polarityFabio Estevam
The FEC driver ignores the GPIO polarity from 'phy-reset-gpios' and considers that the Ethernet PHY is active low, unless the property 'phy-reset-active-high' is present. Fix the device tree description by explicitly passing the 'GPIO_ACTIVE_LOW' flag to the 'phy-reset-gpios' property. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-05ARM: 8677/1: boot/compressed: fix decompressor header layout for v7-MArd Biesheuvel
As reported by Patrice, the header layout of the decompressor is incorrect when building for v7-M. In this case, the __nop macro resolves to 'mov r0, r0', which is emitted as a narrow encoding, resulting in the header data fields to end up at lower offsets than required. Given the variety of targets we need to support with the same code, the startup sequence is a bit of a jumble, and uses instructions and macros whose encoding widths cannot be specified (badr), or only exist in a narrow encoding (bx) So force the use of a wide encoding in __nop, and replace the start sequence with a simple jump to the label marking the start of code, preceded by a Thumb2 mode switch if required (using explicit wide encodings where appropriate). The label itself can be moved to the start of code [where it belongs] due to the larger range of branch instructions as compared to adr instructions. Reported-by: Patrice CHOTARD <patrice.chotard@st.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-05ARM: 8676/1: NOMMU: provide pgprot_device() macroVladimir Murzin
NOMMU build leads to the following error: CC drivers/pci/mmap.o drivers/pci/mmap.c: In function 'pci_mmap_resource_range': drivers/pci/mmap.c:60:3: error: implicit declaration of function 'pgprot_device' [-Werror=implicit-function-declaration] vma->vm_page_prot = pgprot_device(vma->vm_page_prot); ^ cc1: some warnings being treated as errors scripts/Makefile.build:302: recipe for target 'drivers/pci/mmap.o' failed make[2]: *** [drivers/pci/mmap.o] Error 1 scripts/Makefile.build:561: recipe for target 'drivers/pci' failed make[1]: *** [drivers/pci] Error 2 Makefile:1016: recipe for target 'drivers' failed make: *** [drivers] Error 2 Fix it with support of pgprot_device() macro for NOMMU. Fixes: 00d2904ffeac ("ARM/PCI: Use generic pci_mmap_resource_range()") Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2017-06-04KVM: arm/arm64: use vcpu requests for irq injectionAndrew Jones
Don't use request-less VCPU kicks when injecting IRQs, as a VCPU kick meant to trigger the interrupt injection could be sent while the VCPU is outside guest mode, which means no IPI is sent, and after it has called kvm_vgic_flush_hwstate(), meaning it won't see the updated GIC state until its next exit some time later for some other reason. The receiving VCPU only needs to check this request in VCPU RUN to handle it. By checking it, if it's pending, a memory barrier will be issued that ensures all state is visible. See "Ensuring Requests Are Seen" of Documentation/virtual/kvm/vcpu-requests.rst Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04KVM: arm/arm64: change exit request to sleep requestAndrew Jones
A request called EXIT is too generic. All requests are meant to cause exits, but different requests have different flags. Let's not make it difficult to decide if the EXIT request is correct for some case by just always providing unique requests for each case. This patch changes EXIT to SLEEP, because that's what the request is asking the VCPU to do. Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04KVM: arm/arm64: properly use vcpu requestsAndrew Jones
arm/arm64 already has one VCPU request used when setting pause, but it doesn't properly check requests in VCPU RUN. Check it and also make sure we set vcpu->mode at the appropriate time (before the check) and with the appropriate barriers. See Documentation/virtual/kvm/vcpu-requests.rst. Also make sure we don't leave any vcpu requests we don't intend to handle later set in the request bitmap. If we don't clear them, then kvm_request_pending() may return true when it shouldn't. Using VCPU requests properly fixes a small race where pause could get set just as a VCPU was entering guest mode. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04KVM: improve arch vcpu request definingAndrew Jones
Marc Zyngier suggested that we define the arch specific VCPU request base, rather than requiring each arch to remember to start from 8. That suggestion, along with Radim Krcmar's recent VCPU request flag addition, snowballed into defining something of an arch VCPU request defining API. No functional change. (Looks like x86 is running out of arch VCPU request bits. Maybe someday we'll need to extend to 64.) Signed-off-by: Andrew Jones <drjones@redhat.com> Acked-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org>
2017-06-04signal: Remove non-uapi <asm/siginfo.h>Christoph Hellwig
By moving the kernel side __SI_* defintions right next to the userspace ones we can kill the non-uapi versions of <asm/siginfo.h> include include/asm-generic/siginfo.h and untangle the unholy mess of includes. [ tglx: Removed uapi/asm/siginfo.h from m32r, microblaze, mn10300 and score ] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Tony Luck <tony.luck@intel.com> Cc: linux-ia64@vger.kernel.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: sparclinux@vger.kernel.org Cc: "David S. Miller" <davem@davemloft.net> Link: http://lkml.kernel.org/r/20170603190102.28866-6-hch@lst.de
2017-06-04ARM: dts: imx7: Fix typo in watchdog pin nameFabio Estevam
Change "WDOD1" to "WDOG1" in watchdog pin names. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-04ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FSLeonard Crestez
This option was removed by "make savedefconfig" in commit c5054a98bce4 ("ARM: imx_v6_v7_defconfig: Select SMSC_PHY") This happened because CONFIG_DEBUG_FS was implicitly selected by CONFIG_TREE_RCU_TRACE which defaulted to true because CONFIG_RCU_TRACE was enabled by default by commit 961518259b3b ("rcu: Enable RCU tracepoints by default to aid in debugging") Recently however CONFIG_RCU_TRACE was completely removed by commit 6e74c237c410 ("rcu: Remove debugfs tracing") The result is that imx_v6_v7_defconfig no longer includes DEBUG_FS on linux-next since next-20170517. This is bad, DEBUG_FS is extremely useful for kernel introspection and testing. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-03arm,arm64,drivers: add a prefix to drivers arch_topology interfacesJuri Lelli
Now that some functions that deal with arch topology information live under drivers, there is a clash of naming that might create confusion. Tidy things up by creating a topology namespace for interfaces used by arch code; achieve this by prepending a 'topology_' prefix to driver interfaces. Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03arm,arm64,drivers: move externs in a new header fileJuri Lelli
Create a new header file (include/linux/arch_topology.h) and put there declarations of interfaces used by arm, arm64 and drivers code. Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03arm,arm64,drivers: reduce scope of cap_parsing_failedJuri Lelli
Reduce the scope of cap_parsing_failed (making it static in drivers/base/arch_topology.c) by slightly changing {arm,arm64} DT parsing code. For arm checking for !cap_parsing_failed before calling normalize_ cpu_capacity() is superfluous, as returning an error from parse_ cpu_capacity() (above) means cap_from _dt is set to false. For arm64 we can simply check if raw_capacity points to something, which is not if capacity parsing has failed. Suggested-by: Morten Rasmussen <morten.rasmussen@arm.com> Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03arm, arm64: factorize common cpu capacity default codeJuri Lelli
arm and arm64 share lot of code relative to parsing CPU capacity information from DT, using that information for appropriate scaling and exposing a sysfs interface for chaging such values at runtime. Factorize such code in a common place (driver/base/arch_topology.c) in preparation for further additions. Suggested-by: Will Deacon <will.deacon@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03arm: remove wrong CONFIG_PROC_SYSCTL ifdefJuri Lelli
The sysfs cpu_capacity entry for each CPU has nothing to do with PROC_FS, nor it's in /proc/sys path. Remove such ifdef. Cc: Russell King <linux@arm.linux.org.uk> Reported-and-suggested-by: Sudeep Holla <sudeep.holla@arm.com> Fixes: 7e5930aaef5d ('ARM: 8622/3: add sysfs cpu_capacity attribute') Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03arm: fix return value of parse_cpu_capacityJuri Lelli
parse_cpu_capacity() has to return 0 on failure, but it currently returns 1 instead if raw_capacity kcalloc failed. Fix it (by directly returning 0). Reported-by: Morten Rasmussen <morten.rasmussen@arm.com> Fixes: 06073ee26775 ('ARM: 8621/3: parse cpu capacity-dmips-mhz from DT') Signed-off-by: Juri Lelli <juri.lelli@arm.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Vincent Guittot <vincent.guittot@linaor.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-03ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCUChen-Yu Tsai
The AR100 clock within the R_CCU (PRCM) has the PLL_PERIPH0 as one of its parents. This adds the reference in the device tree describing this relationship. This patch uses a raw number for the clock index to ease merging by avoiding cross tree dependencies. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-03ARM: sun8i: a83t: Add device node for PRCMChen-Yu Tsai
The A83T's PRCM has the same set of clocks and resets as the A64. However, a few dividers are different. And due to the lack of a low speed 32.768 kHz oscillator, a few of the clock parents are different. The PRCM also has controls for various power domains. These are not supported yet, neither in software nor in the device tree binding. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-02ARM: dts: exynos: Add HDMI CEC device to Exynos5 SoC familyMarek Szyprowski
Exynos5250 and Exynos542x SoCs have the same CEC hardware module as Exynos4 SoC series, so enable support for it using the same compatible string. Tested on Odroid XU3 (Exynos5422) and Google Snow (Exynos5250) boards. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-02ARM: dts: rockchip: enable usb for rk3229 evb boardWilliam Wu
Rockchip's rk3229 evaluation board has one usb otg controller and three usb host controllers. Each usb controller connect with one usb2 phy port through UTMI+ interface. And the three usb host interfaces use the same GPIO VBUS drive. Let's enable them to support usb on rk3229 evb board. Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-06-02ARM: dts: rockchip: add usb nodes on rk322xWilliam Wu
This patch adds usb otg/host controllers and phys nodes on rk322x. Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-06-02ARM: at91: debug: add samv7x supportSzemző András
Add support for low level debugging on Atmel samv7x. Signed-off-by: Szemző András <sza@esh.hu> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-06-02ARM: at91: handle CONFIG_PM for armv7m configurationsAlexandre Belloni
There is currently no PM support for samx7 but the symbol can still be selected. This avoids compilation issues. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-06-02ARM: at91: Add armv7m supportSzemző András
Add Atmel SAME70/SAMS70/SAMV71 SoC support. Signed-off-by: Szemző András <sza@esh.hu> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-06-01ARM: dts: augment Moxa and Aspeed DTS for FTTMR010Linus Walleij
This augments the Moxa Art and Aspeed device trees to: - Explicitly name the clock "PCLK" as the Faraday FTTMR010 names it. - List the Moxa timer as compatible with the Faradat FTTMR010 vanilla version. - Add a comment that the Aspeed driver is a Faraday FTTMR010 derivative. - Pass all IRQs to the timer from Aspeed: they are all there so they should be in the device tree, we only use the first one anyways. Tested-by: Joel Stanley <joel@jms.id.au> Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01Merge tag 'gemini-v4.13-dts-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt This is a first set of Gemini DTS patches for the v4.13 cycle. This adds the reset and clock lines to the Gemini core DTS SoC. These bindings have been ACKed by the DT maintainer Rob. The reset driver is going to be merged by the reset maintainer. The clock driver is going to be merged by the clock maintainers. Each of these have their macro defines coming with them, split off as separate patches. A post-rc1 patch will be sumbitted for switching the numerical values to the defined macros in line with the ARM SoC DT header merge strategy. * tag 'gemini-v4.13-dts-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: Add clocks to the Gemini SoC ARM: dts: Add the Gemini reset controller dt-bindings: Augment Gemini for clocks, resets Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01Merge tag 'renesas-dt-for-v4.13' of ↵Olof Johansson
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Renesas ARM Based SoC DT Updates for v4.13 * Switch to panel-lvds bindings for Mitsubishi panels * Clean up PFC node names * Enable UHS-I SDR-50 and SDR-104 on r8a7793/Gose * Add GyroADC clock and device for r8a7791 SoC * Add USB clocks to device tree for r7s72100 SoC * tag 'renesas-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: dts: renesas: Switch to panel-lvds bindings for Mitsubishi panels ARM: dts: gose: Enable UHS-I SDR-50 and SDR-104 ARM: dts: r8a7793: set maximum frequency for SDHI clocks ARM: dts: r8a7791: Add GyroADC clock and device node ARM: dts: r7s72100: add usb clocks to device tree ARM: dts: sh73a0: update PFC node name to pin-controller ARM: dts: r8a7793: update PFC node name to pin-controller ARM: dts: r8a7791: update PFC node name to pin-controller ARM: dts: r8a7790: update PFC node name to pin-controller ARM: dts: r8a7779: update PFC node name to pin-controller ARM: dts: r8a7778: update PFC node name to pin-controller ARM: dts: r8a7740: update PFC node name to pin-controller ARM: dts: r8a73a4: update PFC node name to pin-controller ARM: dts: emev2: update PFC node name to pin-controller ARM: dts: r7s72100: add USB bit definitions ARM: dts: r7s72100: add Renesas RZ/A1 pinctrl header ARM: dts: r8a7791: add GyroADC clock Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01Merge tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu into fixesOlof Johansson
mvebu fixes for 4.12 Fix the interrupt description of the crypto node for device tree of the Armada 7K/8K SoCs * tag 'mvebu-fixes-4.12-1' of git://git.infradead.org/linux-mvebu: (316 commits) arm64: marvell: dts: fix interrupts in 7k/8k crypto nodes + Linux 4.12-rc2 Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01Merge tag 'at91-4.12-fixes' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into fixes Fixes for 4.12: Fix two compilation issues * tag 'at91-4.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: ARM: at91: select CONFIG_ARM_CPU_SUSPEND memory: atmel-ebi: mark PM ops as __maybe_unused Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01ARM: dts: versatile: use #include "..." to include local DTMasahiro Yamada
Most of DT files in ARM use #include "..." to make pre-processor include DT in the same directory, but this is one of the exceptional files that use #include <...> for that. Fix it to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from dtc_cpp_flags. ARM: dts: versatile: use #include "..." to include DT in the same directory Most of DT files in ARM use #include "..." to make pre-processor include DT in the same directory, but we have 3 exceptional files that use #include <...> for that. They must be fixed to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from dtc_cpp_flags. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2017-06-01ARM: dts: rockchip: add adc button for FireflyRandy Li
The only adc button connected to adc input is recovery button. Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-06-01ARM: dts: imx6ul-14x14-evk: Add ksz8081 phy propertiesLeonard Crestez
Right now mach-imx6ul registers a fixup for the ksz8081 phy. The same register values can be set through the micrel phy driver by using dts properties. This seems preferable and allows cleanly fixing suspend/resume. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2017-06-01crypto: arm/crc32 - enable module autoloading based on CPU feature bitsArd Biesheuvel
Make the module autoloadable by tying it to the CPU feature bits that describe whether the optional instructions it relies on are implemented by the current CPU. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-01crypto: arm/sha2-ce - enable module autoloading based on CPU feature bitsArd Biesheuvel
Make the module autoloadable by tying it to the CPU feature bit that describes whether the optional instructions it relies on are implemented by the current CPU. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-01crypto: arm/sha1-ce - enable module autoloading based on CPU feature bitsArd Biesheuvel
Make the module autoloadable by tying it to the CPU feature bit that describes whether the optional instructions it relies on are implemented by the current CPU. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-01crypto: arm/ghash-ce - enable module autoloading based on CPU feature bitsArd Biesheuvel
Make the module autoloadable by tying it to the CPU feature bit that describes whether the optional instructions it relies on are implemented by the current CPU. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-06-01crypto: arm/aes-ce - enable module autoloading based on CPU feature bitsArd Biesheuvel
Make the module autoloadable by tying it to the CPU feature bit that describes whether the optional instructions it relies on are implemented by the current CPU. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2017-05-31ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus supportJagan Teki
NanoPi M1 Plus is designed and developed by FriendlyElec for professionals, enterprise users, makers and hobbyists using the Allwinner H3 SOC. NanoPi M1 Plus key features - Allwinner H3, Quad-core Cortex-A7@1.2GHz - 1GB DDR3 RAM - 8GB eMMC - microSD slot - 10/100/1000M Ethernet - Serial Debug Port - 5V 2A DC power-supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-05-31ARM: s3c64xx: Do not select ARM_AMBA from S3C64XX_PL080Arnd Bergmann
While trying a fix a build warning unrelated to s3c64xx, I ran into a circular dependency: drivers/i2c/Kconfig:7: symbol I2C is selected by FB_DDC drivers/video/fbdev/Kconfig:63: symbol FB_DDC is selected by FB_CYBER2000_DDC drivers/video/fbdev/Kconfig:381: symbol FB_CYBER2000_DDC depends on FB_CYBER2000 drivers/video/fbdev/Kconfig:369: symbol FB_CYBER2000 depends on FB drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER drivers/gpu/drm/Kconfig:72: symbol DRM_KMS_FB_HELPER is selected by DRM_KMS_CMA_HELPER drivers/gpu/drm/Kconfig:137: symbol DRM_KMS_CMA_HELPER is selected by DRM_PL111 drivers/gpu/drm/pl111/Kconfig:1: symbol DRM_PL111 depends on ARM_AMBA drivers/amba/Kconfig:1: symbol ARM_AMBA is selected by S3C64XX_PL080 arch/arm/mach-s3c64xx/Kconfig:42: symbol S3C64XX_PL080 default value contains DMADEVICES drivers/dma/Kconfig:5: symbol DMADEVICES is selected by SND_SOC_SH4_SIU sound/soc/sh/Kconfig:29: symbol SND_SOC_SH4_SIU is selected by SND_SIU_MIGOR sound/soc/sh/Kconfig:59: symbol SND_SIU_MIGOR depends on I2C The I2C and FB dependencies are hard to untangle, but I notice that S3C64XX_PL080 selecting ARM_AMBA is one piece of the puzzle that can easily be avoided, as ARCH_S3C64XX already select ARM_AMBA. Removing the redundant 'select' now can help us in the future if we run into a variation of the same dependency. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-05-31ARM: dts: am43xx-clocks: Add support for CLKOUT2Peter Ujfalusi
Add the needed clock nodes for the CLKOUT2 to be usable by boards. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-05-31arm: dts: Add Mediatek MT2701 i2c device nodeJun Gao
Add MT2701 i2c device node. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-05-31arm: dts: mt2701: Add node for Mediatek JPEG DecoderRick Chang
Signed-off-by: Rick Chang <rick.chang@mediatek.com> Signed-off-by: Minghsiu Tsai <minghsiu.tsai@mediatek.com> [mb: include mt2701-larb-port.h to fix build errors] Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-05-31ARM: dts: at91: sama5d2_xplained: add pwm controllerClaudiu Beznea
Add pwm controller bindings for sama5d2_xplained and enable it. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-05-31ARM: dts: at91: Add the NOR flash available on sama5d3 dev kitsBoris Brezillon
sama5d3 CPU modules embed a parallel NOR flash connected to the EBI bus. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-05-31ARM: dts: at91: Switch to the new NAND bindingsBoris Brezillon
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND nodes along the way. Note that we keep using old bindings in at91rm9200.dtsi because this SoC is not supported by the EBI driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Peter Rosin <peda@axentia.se> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-05-31ARM: dts: at91: Declare EBI/NAND controllersBoris Brezillon
Declare new nodes for the EBI and NAND controllers embedded in various at91/sama5 SoCs. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-05-31ARM: dts: at91-sama5d4: use IRQ_TYPE_* to specify irq flagsUwe Kleine-König
According to the binding documentation and the source code the atmel-gpio controller takes IRQ_TYPE_* as its flags values, not GPIO_ACTIVE_*. This patch uses the right variable type which yields the same result when compiled. Note that this might be wrong and actually IRQ_TYPE_LEVEL_LOW is intended by the dt author. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>