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Add support for the Toradex Apalis Evaluation Board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for the Toradex Ixora V1.1 carrier board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Migrate to using functionally-reduced I2C master contained in the DWC
HDMI. Therefore drop the GPIO bitbanging based i2cddc definition and
modify resp. pinctrl.
While at it re-order the I2C aliases to start with the generic, followed
by the camera and concluded by the power I2C one.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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gen1_i2c comment
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Split the pinctrl property for usdhc1 into a 4-bit SD interface
and an extension to 8-bit. This is required to support both 8-bit
and 4-bit interface on usdhc1 as per the carrier board.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The SD1 pinctrl-0 property is overridden but only the card detect pin
is muxed, the control and data signals are not referenced at all.
It worked because the bootloader muxed them to a sensible state though.
Fix this.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add watchdog device tree node for rv1108
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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There are four i2c controllers on rv1108, add
device tree node for them.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Peter Pan <peterpandong@micron.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Han Xu <han.xu@nxp.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
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A CMA memory pool reserved memory node is added, and is attached
to the DSP node through the 'memory-region' property on the K2G
ICE board. This area will be used for allocating virtio rings and
buffers. This node allows the DSP Memory Protection and Address
Extension (MPAX) module to be configured properly for the DSP
processor, and matches the values used on the other Keystone 2
boards for software compatibility.
The reserved memory node and the user DSP node are also marked
okay to enable the DSP on the K2G ICE board.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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A CMA memory pool reserved memory node is added, and is attached
to the DSP node through the 'memory-region' property on the K2G
EVM board. This area will be used for allocating virtio rings and
buffers. This node allows the DSP Memory Protection and Address
Extension (MPAX) module to be configured properly for the DSP
processor, and matches the values used on the other Keystone 2
boards for software compatibility.
The reserved memory node and the user DSP node are also marked
okay to enable the DSP on the 66AK2G EVM board.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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The Keystone 2 66AK2G SoC has a single TMS320C66x DSP Core
Subsystem (C66x CorePac), containing a C66x Fixed/Floating-Point
DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add
the DT node for this DSP processor sub-system.
The DT node has a new property 'power-domains' and no 'clocks'
properties, and uses slightly different property values for
'resets' compared to other Keystone 2 SoCs. The processor does
not have an MMU, and uses various IPC Generation registers and
shared memory for inter-processor communication. The alias with
a stem 'rproc' has also been added for the DSP, it provides a
fixed remoteproc id for the DSP processor.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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This patch enables the integrated PHY for rk3228 evb board
by default.
To use the external 1000M PHY on evb board, need to make
some switch of evb board to be on.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Enable the rockchip PHY driver for multi_v7_defconfig builds.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Rename the ->enter_freeze cpuidle driver callback to ->enter_s2idle
to make it clear that it is used for entering suspend-to-idle and
rename the related functions, variables and so on accordingly.
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Nadav reported parallel MADV_DONTNEED on same range has a stale TLB
problem and Mel fixed it[1] and found same problem on MADV_FREE[2].
Quote from Mel Gorman:
"The race in question is CPU 0 running madv_free and updating some PTEs
while CPU 1 is also running madv_free and looking at the same PTEs.
CPU 1 may have writable TLB entries for a page but fail the pte_dirty
check (because CPU 0 has updated it already) and potentially fail to
flush.
Hence, when madv_free on CPU 1 returns, there are still potentially
writable TLB entries and the underlying PTE is still present so that a
subsequent write does not necessarily propagate the dirty bit to the
underlying PTE any more. Reclaim at some unknown time at the future
may then see that the PTE is still clean and discard the page even
though a write has happened in the meantime. I think this is possible
but I could have missed some protection in madv_free that prevents it
happening."
This patch aims for solving both problems all at once and is ready for
other problem with KSM, MADV_FREE and soft-dirty story[3].
TLB batch API(tlb_[gather|finish]_mmu] uses [inc|dec]_tlb_flush_pending
and mmu_tlb_flush_pending so that when tlb_finish_mmu is called, we can
catch there are parallel threads going on. In that case, forcefully,
flush TLB to prevent for user to access memory via stale TLB entry
although it fail to gather page table entry.
I confirmed this patch works with [4] test program Nadav gave so this
patch supersedes "mm: Always flush VMA ranges affected by zap_page_range
v2" in current mmotm.
NOTE:
This patch modifies arch-specific TLB gathering interface(x86, ia64,
s390, sh, um). It seems most of architecture are straightforward but
s390 need to be careful because tlb_flush_mmu works only if
mm->context.flush_mm is set to non-zero which happens only a pte entry
really is cleared by ptep_get_and_clear and friends. However, this
problem never changes the pte entries but need to flush to prevent
memory access from stale tlb.
[1] http://lkml.kernel.org/r/20170725101230.5v7gvnjmcnkzzql3@techsingularity.net
[2] http://lkml.kernel.org/r/20170725100722.2dxnmgypmwnrfawp@suse.de
[3] http://lkml.kernel.org/r/BD3A0EBE-ECF4-41D4-87FA-C755EA9AB6BD@gmail.com
[4] https://patchwork.kernel.org/patch/9861621/
[minchan@kernel.org: decrease tlb flush pending count in tlb_finish_mmu]
Link: http://lkml.kernel.org/r/20170808080821.GA31730@bbox
Link: http://lkml.kernel.org/r/20170802000818.4760-7-namit@vmware.com
Signed-off-by: Minchan Kim <minchan@kernel.org>
Signed-off-by: Nadav Amit <namit@vmware.com>
Reported-by: Nadav Amit <namit@vmware.com>
Reported-by: Mel Gorman <mgorman@techsingularity.net>
Acked-by: Mel Gorman <mgorman@techsingularity.net>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Nadav Amit <nadav.amit@gmail.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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This patch is a preparatory patch for solving race problems caused by
TLB batch. For that, we will increase/decrease TLB flush pending count
of mm_struct whenever tlb_[gather|finish]_mmu is called.
Before making it simple, this patch separates architecture specific part
and rename it to arch_tlb_[gather|finish]_mmu and generic part just
calls it.
It shouldn't change any behavior.
Link: http://lkml.kernel.org/r/20170802000818.4760-5-namit@vmware.com
Signed-off-by: Minchan Kim <minchan@kernel.org>
Signed-off-by: Nadav Amit <namit@vmware.com>
Acked-by: Mel Gorman <mgorman@techsingularity.net>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: Jeff Dike <jdike@addtoit.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Hugh Dickins <hughd@google.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Nadav Amit <nadav.amit@gmail.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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TI's DP83867 phy is used on DRA72x EVM rev C and DRA71x
EVMs. Enable support for it in omap2plus_defconfig.
The driver is built into the kernel to help NFS booting.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The DRA72 EVM Rev C straps the DP83867 GigaBit Ethernet phy's RX_DV/RX_CTRL
pin in mode 1. Unfortunately, the phy data manual disallows this.
Add "ti,dp83867-rxctrl-strap-quirk" property to the phy's device-tree node
to allow kernel to enable software workaround for this incorrect strap
setting. This is as suggested by the phy's datamanual and ensures proper
operation of this PHY.
This needs to be done for both instances of this PHY present on the board.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The DRA71 EVM straps the DP83867 GigaBit Ethernet phy's RX_DV/RX_CTRL pin
in mode 1. Unfortunately, the phy data manual disallows this.
Add "ti,dp83867-rxctrl-strap-quirk" property to the phy's device-tree node
to allow kernel to enable software workaround for this incorrect strap
setting. This is as suggested by the phy's datamanual and ensures proper
operation of this PHY.
This needs to be done for both instances of this PHY present on the board.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add dra7 iodelay configuration.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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PINCTRL_TI_IODELAY should be enabled so that "pinctrl_dev" can be created
for pinctrl entries populated with iodelay values in device tree data.
Select PINCTRL_TI_IODELAY for SOC_DRA7XX here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Enable C_CAN/D_CAN driver supported by 66AK2G
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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Add nodes for the two DCAN instances included in 66AK2G
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[d-gerlach@ti.com: add power-domains and clock information]
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[fcooper@ti.com: update subject and commit message. Misc minor updates]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
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The interrupt for power button is static data that comes from the
datasheet, there is no reason to need to define this value on every
board so seams reasonable put this information into the common tps65217
file.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The interrupt specifiers for USB and AC charger input are static data that
comes from the datasheet, there is no reason to need to define these values
on every board so seem reasonable put this information into the common
tps65217 file.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Replace deprecated "vmmc_aux" with the generic "vqmmc" binding for
MMC IO supply.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Linux v4.13-rc1
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DRA74x EVM Rev H EVM comes with revision 2.0 silicon.
However, earlier versions of EVM can come with either
revision 1.1 or revision 1.0 of silicon.
The device-tree file is written to support rev 2.0 of
silicon. pdata quirks are used to then override the
settings needed for PG 1.1 silicon.
PG 1.1 silicon has limitations w.r.t frequencies at
which MMC1/2/3 can operate as well as different IOdelay
numbers.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.
Let's leave the dummy omap2_system_dma_init_dev() check
in place for now to avoid a pointless merge conflict with
tusb6010 dmaengine conversion as pointed out by Peter
Ujfalusi <peter.ujfalusi@ti.com>.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The GPIO polarity for MMC1 card detect is set to '0' which means
active-high. However the polarity should be active-low. Fix it
here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The GPIO polarity for MMC1 card detect is set to '0' which means
active-high. However the polarity should be active-low. Fix it
here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Since commit a8636c89648a ("PM / Runtime: Don't allow to suspend a
device with an active child"), which went into 4.10, it is no longer
permitted to set RPM_SUSPENDED state for a device with active children
(unless power.ignore_children is set).
This specifically means that the attempts to do just that from the omap
pm-domain suspend_noirq callback have since been failing whenever a
child is active, for example:
am335x-usb-childs 47400000.usb: runtime PM trying to suspend
device but active child
Silence this warning by dropping the broken pm_runtime_set_suspended()
call from the omap suspend_noirq callback along with the redundant
pm_runtime_set_active() in resume_noirq.
This effectively reverts commit 3522bf7bfa24 ("ARM: OMAP2+: omap_device:
maintain sane runtime pm status around suspend/resume"), which started
updating the RPM state after the runtime_suspend callback (!) for active
omap devices had been called during system suspend. The rationale was
that a later pm_runtime_get_sync() would then fail (even after runtime
pm had been disabled) and that this in turn would avoid any external
aborts when accessing registers with clocks disabled. (See also commit
6f3c77b040fc ("PM / Runtime: let rpm_resume() succeed if RPM_ACTIVE,
even when disabled, v2").
But during the suspend_noirq phase all children would already have been
suspended and their drivers would specifically not attempt any further
register accesses. And if this was all just a workaround for random
device drivers doing cross-tree calls during system suspend, those
drivers should be fixed and updated to explicitly model such
dependencies using device-links instead (and either way, any such calls
have been causing crashes since 4.10).
Fixes: 3522bf7bfa24 ("ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume")
Fixes: a8636c89648a ("PM / Runtime: Don't allow to suspend a device with an active child")
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Johan Hovold <johan@kernel.org>
Tested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Generate irqentry and softirqentry text sections without
any Kconfig dependencies. This will add extra sections, but
there should be no performace impact.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: David S . Miller <davem@davemloft.net>
Cc: Francis Deslauriers <francis.deslauriers@efficios.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Mikael Starvik <starvik@axis.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: linux-arch@vger.kernel.org
Cc: linux-cris-kernel@axis.com
Cc: mathieu.desnoyers@efficios.com
Link: http://lkml.kernel.org/r/150172789110.27216.3955739126693102122.stgit@devbox
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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This SoC is too old. It is difficult to maintain any longer.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The UniPhier AIO2013 audio system needs I2S and clock signal pins
to connect external codec chip.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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The iWave RZ/G1M Q7 SOM supports RTC (TI BQ32000).
To increase hardware support enable the driver in the
shmobile_defconfig multiplatform configuration.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The UART bindings needs specifying a SoC family, use the meson6 family
for the UART nodes like the other nodes.
Switch to the stable UART bindings for meson6 by adding a XTAL node and
using the proper compatible strings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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This patch adds and enables the device-tree definitions for
both qcom,ipq4019-wifi blocks for the IPQ4019.
Support for these have been added into the ath10k driver since:
commit 280e762e9c72 ("ath10k: enable ipq4019 device probe in ahb module")
The binding documentation was added in:
commit a47aaa69de88 ("dt: bindings: add new dt entry for pre calibration in qcom, ath10k.txt")
This has been tested on an ASUS RT-AC58U (IPQ4019),
an AVM Fritz!Box 4040 (IPQ4018), a Compex WPJ428 (IPQ4028)
and a Cisco Meraki MR33 (IPQ4029).
| a000000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff [...]
| a000000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1
| a000000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p,mfp,[...]
| a000000.wifi: board_file api 2 bmi_id 0:16 crc32 5773b188
| a000000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...]
...
| a800000.wifi: qca4019 hw1.0 target 0x01000000 chip_id 0x003b00ff sub 0000:0000
| a800000.wifi: kconfig debug 0 debugfs 1 tracing 0 dfs 1 testmode 1
| a800000.wifi: firmware ver 10.4-3.4-00082 api 5 features no-p2p, [...]
| a800000.wifi: board_file api 2 bmi_id 0:17 crc32 5773b188
| a800000.wifi: htt-ver 2.2 wmi-op 6 htt-op 4 cal pre-cal-file [...]
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Replace the obsolete compatible string for Coresight programmable
replicator with the new one.
Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This architecture has a pseudo random number generator
supported by the existing "qcom,prng" binding.
rngtest: bits received from input: 5795960032
rngtest: FIPS 140-2 successes: 289591
rngtest: FIPS 140-2 failures: 207
rngtest: FIPS 140-2(2001-10-10) Monobit: 25
rngtest: FIPS 140-2(2001-10-10) Poker: 28
rngtest: FIPS 140-2(2001-10-10) Runs: 91
rngtest: FIPS 140-2(2001-10-10) Long run: 67
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=244; avg=46122; max=3906250)Kibits/s
rngtest: FIPS tests speed: (min=1.327; avg=20.966; max=26.345)Mibits/s
rngtest: Program run time: 386965827 microseconds
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The node for xo and timer belong to the SoC DTS file.
Else, new board DT files may not inherit these nodes.
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This patch fixes the pinctrl node addresses to be the correct format.
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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This adds the basic pin control muliplexing settings for the
Gemini SoC: parallel (NOR) flash, SATA, optional IDE, PCI and
UART.
We also select the right GPIO groups on all applicable systems
so that GPIO keys/LEDs work smoothly.
We can then build upon this for more complex systems.
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds a device tree file for the Gemini-based D-Link DIR-685
router, supporting all devices that are currently supported in
the main DTSI SoC file.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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