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2017-06-16ARM: dts: meson8: add the pins for the SDIO controllerMartin Blumenstingl
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16ARM: dts: meson8: add the PWM_E and PWM_F pinsMartin Blumenstingl
This adds the definition of the PWM_E (CBUS) and PWM_F (AOBUS) to meson8.dtsi, allowing devices to use them. PWM_E can be used on some devices to generate the 32.768kHz clock for the SDIO wifi module, while PWM_F can be used to control the power LED. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16ARM: dts: meson: use GIC_SPI and IRQ_TYPE_EDGE_RISING macrosMartin Blumenstingl
This makes meson.dtsi easier to read as we are not using magic numbers for the GIC interrupt type (GIC_SPI) and the interrupt polarity (IRQ_TYPE_EDGE_RISING). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16ARM: dts: meson: use C preprocessor friendly include syntaxMartin Blumenstingl
This replaces the "/include/" syntax with the "#include" syntax in all Amlogic Meson .dts and .dtsi files. That is required to use preprocessor defines (like GIC_SPI and IRQ_TYPE_EDGE_RISING) in meson.dtsi (all files which directly or indirectly include meson.dtsi need to use the "#include" syntax, otherwise the .dts files cannot be compiled). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16ARM: dts: meson8: fix the IR receiver pinsMartin Blumenstingl
The IR receiver pins are currently defined in the CBUS pin-controller. However the pins are in the AO region, which is controlled by the AOBUS pin-controller. Move the pins to pinctrl_aobus so they can actually be used. Fixes: b60e1157d8fa ("ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16ARM: dts: exynos: Fix polarity of panel reset gpio in RinatoHoegeun Kwon
This reset gpio is active low, therefore fix from active high to low. Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-16ARM: davinci_all_defconfig: enable USB CDC NCM gadgetSekhar Nori
Enable USB CDC NCM gadget module in davinci_all_defconfig to make it easier to use it on these devices. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-16ARM: davinci_all_defconfig: enable mtdtestsSekhar Nori
mtdtests module has some useful tests to verify that mtd drivers like davinci_nand are working correctly. Enable it in davinci_all_defconfig to make testing and debug easier. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-15ARM: davinci: fix const warningsKevin Hilman
After VPIF was converted to enable getting subdevs from DT, the pdata is no longer const, so remove these to avoid compiler warnings. Signed-off-by: Kevin Hilman <khilman@baylibre.com> [nsekhar@ti.com: minor commit message fixup] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2017-06-15ARM: dts: exynos: add needs-hpd to &hdmicec for Odroid-U3Hans Verkuil
The Odroid-U3 board has an IP4791CZ12 level shifter that is disabled if the HPD is low, which means that the CEC pin is disabled as well. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-06-15arm: perf: make of_device_ids constArvind Yadav
of_device_ids are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const structs as const. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-06-15Merge branch 'kvmarm-master/master' into HEADMarc Zyngier
2017-06-15ARM: dts: ls1021a: update the clockgen nodeYuantian Tang
qoriq clock driver has been updated to parse the clock configuration information defined in driver itself not in dts. Since the new implementation and the bindings have been merged, it is time to update the clock related node and remove redundent clock configuration information from the dts. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-15ARM: imx_v6_v7_defconfig: Set THERMAL_WRITABLE_TRIPS=y for testingLeonard Crestez
Setting trip points is supported by the imx thermal driver and it is useful to be able to test this without adjusting config. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: sun6i: a31s: primo81: Enable battery power supplyChen-Yu Tsai
The MSI Primo81 tablet has a 3500 mAh 3.7V LiPo battery. Enable the PMIC's battery power supply so the battery can be monitored. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14ARM: sun6i: a31s: primo81: Change USB OTG to OTG modeChen-Yu Tsai
Now that we have support for the AXP221 PMIC's USB VBUS detection and DRIVEVBUS vbus control, we can use the USB OTG port in proper OTG mode. This patch enables the aforementioned PMIC functions, adds the OTG ID detection pin to the USB PHY node, and changes the mode of USB OTG to "otg". Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14ARM: sun8i: a83t: Add dt node for the syscon control moduleCorentin Labbe
This patch add the dt node for the syscon register present on the Allwinner A83T Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-06-14ARM: dts: imx6-sabreauto: add the ADV7180 video decoderSteve Longerbeam
Enables the ADV7180 decoder sensor. The ADV7180 connects to the parallel-bus mux input on ipu1_csi0_mux. The ADV7180 power pin is via max7310_b port expander. Changes from Tim Harvey: - Use IRQ_TYPE_LEVEL_LOW instead of 0x8 for interrupt type for clarity. - For 8-bit parallel IPU1-CSI0 bus connection only data[12-19] are used. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabreauto: add pinctrl for gpt input captureSteve Longerbeam
Add pinctrl groups for both GPT input capture channels. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabreauto: add reset-gpios property for max7310_bSteve Longerbeam
The reset pin to the port expander chip (MAX7310) is controlled by a gpio, so define a reset-gpios property to control it. There are three MAX7310's on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for their reset. Since all can't acquire the same pin, assign it to max7310_b, that chip is needed by more functions (usb and adv7180). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabreauto: create i2cmux for i2c3Steve Longerbeam
The sabreauto uses a steering pin to select between the SDA signal on i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control this steering pin. Idle state of the i2cmux selects SPI NOR. This is not a classic way to use i2cmux, since one side of the mux selects something other than an i2c bus, but it works and is probably the cleanest solution. Note that if one thread is attempting to access SPI NOR while another thread is accessing i2c3, the SPI NOR access will fail since the i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't be avoided in any case, the board is not designed to allow concurrent i2c3 and SPI NOR functions (and the default device-tree does not enable SPI NOR anyway). Devices hanging off i2c3 should now be defined under i2cmux, so that the steering pin can be properly controlled to access those devices. The port expanders (MAX7310) are thus moved into i2cmux. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabresd: add OV5642 and OV5640 camera sensorsSteve Longerbeam
Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor. The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux. The OV5640 connects to the input port on the MIPI CSI-2 receiver on mipi_csi. Until the OV5652 sensor module compatible with the SabreSD becomes available for testing, the ov5642 node is currently disabled. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6-sabrelite: add OV5642 and OV5640 camera sensorsSteve Longerbeam
Adds the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor. Both hang off the same i2c2 bus, so they require different (and non- default) i2c slave addresses. The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux. The OV5640 connects to the input port on the MIPI CSI-2 receiver on mipi_csi. The OV5642 node is disabled temporarily while the subdev driver is cleaned up and submitted later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl-sabrelite: remove erratum ERR006687 workaroundSteve Longerbeam
There is a pin conflict with GPIO_6. This pin functions as a power input pin to the OV5642 camera sensor, but ENET uses it as the h/w workaround for erratum ERR006687, to wake-up the ARM cores on normal RX and TX packet done events. So we need to remove the h/w workaround to support the OV5642. The result is that the CPUidle driver will no longer allow entering the deep idle states on the sabrelite. This is a partial revert of commit 6261c4c8f13e ("ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.") commit a28eeb43ee57 ("ARM: dts: imx6: tag boards that have the HW workaround for ERR006687") Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl: add capture-subsystem deviceSteve Longerbeam
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl: Add video multiplexers, mipi_csi, and their connectionsPhilipp Zabel
This patch adds the device tree graph connecting the input multiplexers to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU multiplexers are added as children of the iomuxc-gpr syscon device node. On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2 CSI1 allow to select between CSI0/1 parallel input pads and the MIPI CSI-2 virtual channels 0/3. On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1 CSI1 allow to select between CSI0/1 parallel input pads and any of the four MIPI CSI-2 virtual channels. Changes from Steve Longerbeam: - Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu) - Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..." to "mipi_vcX...". - Added input endpoint anchors to the video muxes for the connections from parallel sensors. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl: Add compatible, clocks, irqs to MIPI CSI-2 nodeSteve Longerbeam
Add to the MIPI CSI2 receiver node: compatible strings, interrupt sources, and clocks. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14ARM: dts: imx6qdl: add multiplexer controlsPhilipp Zabel
The IOMUXC General Purpose Register space contains various bitfields that control video bus multiplexers. Describe them using a mmio-mux node. The placement of the IPU CSI video mux controls differs between i.MX6D/Q and i.MX6S/DL. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-06-14clocksource/drivers: Rename CLKSRC_OF to TIMER_OFDaniel Lezcano
The config option name is now renamed to 'TIMER_OF' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14clocksource/drivers: Rename clocksource_probe to timer_probeDaniel Lezcano
The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14clocksource/drivers: Rename CLOCKSOURCE_OF_DECLARE to TIMER_OF_DECLAREDaniel Lezcano
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the clocksource at early stage. However, this macro is also used to initialize the clockevent if any, or the clockevent only. It was originally suggested to declare another macro to initialize a clockevent, so in order to separate the two entities even they belong to the same IP. This was not accepted because of the impact on the DT where splitting a clocksource/clockevent definition does not make sense as it is a Linux concept not a hardware description. On the other side, the clocksource has not interrupt declared while the clockevent has, so it is easy from the driver to know if the description is for a clockevent or a clocksource, IOW it could be implemented at the driver level. So instead of dealing with a named clocksource macro, let's use a more generic one: TIMER_OF_DECLARE. The patch has not functional changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-14arm: mach-rpc: ecard: fix build errorGreg Kroah-Hartman
The last commit from me had a missing ';' which broke the build. Thanks to Arnd for pointing out the issue. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-06-14ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ONGeert Uytterhoeven
Improve handling of always-on PM domains by using the GENPD_FLAG_ALWAYS_ON flag introduced in commit ffaa42e8a40b7f10 ("PM / Domains: Enable users of genpd to specify always on PM domains"). Note that the PM domain containing the serial console is still handled locally. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-06-14ARM: OMAP4: hwmod_data: add SHAM crypto acceleratorTero Kristo
OMAP4 SoC contains SHAM crypto hardware accelerator. Add hwmod data for this IP so that it can be utilized by crypto frameworks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: OMAP4: hwmod data: add desSebastian Reichel
This fixes the following error during kernel boot: platform 480a5000.des: Cannot lookup hwmod 'des' Unfortunately the DES module is only documented partly in the OMAP4430 TRM. I found an old patch from Joel, which I took over and updated for currently mainline. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: OMAP4: hwmod data: add aes2Sebastian Reichel
This adds the hwmod entry for the second AES module available on OMAP4. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: OMAP4: hwmod data: add aes1Sebastian Reichel
This fixes the following error during kernel boot: platform 4b501000.aes: Cannot lookup hwmod 'aes1' Unfortunately the AES module is only documented partly in the OMAP4430 TRM. I found an old patch from Joel, which I took over and updated for currently mainline. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: dts: omap4: add SHAM nodeTero Kristo
Add SHAM crypto accelerator. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: dts: omap4: add aes2 instanceTero Kristo
OMAP4 has AES2 instance, so add its integration data under DT. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: dts: omap4.dtsi: remove aes[12]_fckSebastian Reichel
"aes1_fck" and "aes2_fck" are controlled by hwmod. Drop clock entries to avoid conflicts. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: dts: omap4: Fix aes entrySebastian Reichel
OMAP4 has a second aes module, so let's use proper name for the first instance. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-14ARM: pxa: Delete an error message for a failed memory allocation in ↵Markus Elfring
pxa3xx_u2d_probe() Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14ARM: pxa: Improve a size determination in pxa3xx_u2d_probe()Markus Elfring
Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style convention. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14ARM: pxa: Delete an error message for a failed memory allocation in ↵Markus Elfring
pxa_pm_init() Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Link: http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-14ARM: pxa: magician: Add support for ADS7846 touchscreenPetr Cvek
This patch adds a support for ADS7846 touchscreen driver. The basic functionality was tested, x_plate_ohms and y_plate_ohms were physically measured. The value pressure_max was empirically set to match the measured range, which is affected by x_plate_ohms and ADS samples. The value of keep_vref_on should be set. A tested model (T-Mobile MDA Compact PM10A) doesn't seem to use Vref pin as the input from an external source. On this model the unset keep_vref_on cause high jitter of measured values. SPI framing pin (gpio_cs) must be used in GPIO mode due to an incompatible autoframing of PXA27x controller and ADS7846 device. Signed-off-by: Petr Cvek <petr.cvek@tul.cz> Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
2017-06-13ARM: dts: add Gemini PATA/SATA supportLinus Walleij
The NAS4229B and SQ201 Gemini systems have a PATA controller which is linked to a SATA bridge in the SoC. Enable both platforms to use the PATA/SATA devices. Cc: John Feng-Hsin Chiang <john453@faraday-tech.com> Cc: Greentime Hu <green.hu@gmail.com> Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-13ARM: dts: Add Gemini DMA controllerLinus Walleij
This adds the Faraday Technology FTDMAC020 DMA controller to the Gemini SoC DTSI file. It is only used for memcpy work so we can activate it for all users of the chipset. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-06-13Merge tag 'bcm2835-dt-next-2017-06-12' into devicetree/nextFlorian Fainelli
This pull request brings in installation of the RPi3 DT in 32-bit mode, the new thermal nodes, switches to the faster sdhost controller for MMC, and enables USB OTG mode on the Pi 0. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-06-13ARM: dts: add core I2C devices to the APQ8060 DragonboardLinus Walleij
The APQ8060 Dragonboard has an Atmel AT24c128 EEPROM and a Wolfson Micro WM8903 codec connected to its GSBI8 I2C bus. Add entries for these to the device tree. The interrupt line from the WM8903 chip is not routed anywhere on this design so it can not be used. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-06-13ARM: dts: tegra: fix PCI bus dtc warningsRob Herring
dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>