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2019-10-10ARM: bcm: Add support for BCM2711 SoCStefan Wahren
Add the BCM2711 to ARCH_BCM2835, but use new machine board code because of the differences. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Reviewed-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
2019-10-10ARM: dts: Add minimal Raspberry Pi 4 supportStefan Wahren
This adds minimal support for the new Raspberry Pi 4 without the fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory size to zero and let the bootloader take care of it. The DWC2 is still usable as peripheral via the USB-C port. Other differences to the Raspberry Pi 3: - additional GIC 400 Interrupt controller - new thermal IP and HWRNG - additional MMC interface (emmc2) - additional UART, I2C, SPI and PWM interfaces - clock stretching bug in I2C IP has been fixed Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net> Acked-by: Florian Fanelli <f.fainelli@gmail.com>
2019-10-10ARM: dts: bcm283x: Move BCM2835/6/7 specific to bcm2835-common.dtsiStefan Wahren
As preparation we want all common BCM2711 + BCM2835/6/7 functions in bcm283x.dtsi and all BCM2835/6/7 specific in the new bcm2835-common.dtsi. Since i2c2 is BCM2835 specific, we also need to move it to bcm2835-common.dtsi. Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Acked-by: Eric Anholt <eric@anholt.net>
2019-10-10ARM: dts: bcm283x: Remove brcm,bcm2835-pl011 compatibleStefan Wahren
The downstream compatible brcm,bcm2835-pl011 hasn't been upstreamed yet. So remove it. Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
2019-10-10ARM: dts: bcm283x: Remove simple-bus from fixed clocksStefan Wahren
The fixed clocks doesn't form some kind of bus. So let's remove it. This fixes the follow DT schema warnings: clocks: clock@3:reg:0: [3] is too short clocks: clock@4:reg:0: [4] is too short clocks: $nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' clocks: #size-cells:0:0: 0 is not one of [1, 2] clocks: 'ranges' is a required property clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
2019-10-10Merge branch 'linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto fixes from Herbert Xu: "Fix build issues in arm/aes-ce" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: arm/aes-ce - add dependency on AES library crypto: arm/aes-ce - build for v8 architecture explicitly
2019-10-10ARM: dts: omap5: Add PRM dataTero Kristo
Add PRM data for OMAP54xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: am43xx: Add PRM dataTero Kristo
Add PRM data for AM43xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: am33xx: Add PRM dataTero Kristo
Add PRM data for AM33xx SoC. Initially this is used to provide reset support, but will be expanded later to support also powerdomain control. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: omap4: add PRM nodesTero Kristo
Add PRM nodes for omap4 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: dra7: add PRM nodesTero Kristo
Add PRM nodes for dra7 series of SoCs. These are initially used to support reset control for some of the nodes, but will be extended later to add powerdomain control and support for PRCM irqs among other things. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-10ARM: dts: Add OPP-V2 table for AM3517Adam Ford
The AM3517 only lists 600MHz @ 1.2V, but the register values for 0x4830A204 = 1b86 802f, it seems like am3517 might be a derivative of the omap36 which OPPs would be OPP50 (300 MHz) and OPP100 (600 MHz). This patch sets up the OPP50 and OPP100 tables at 300MHz and 600MHz for the AM3517 with each having an operating voltage at 1.2V. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-10ARM: dts: omap36xx: using OPP1G needs to control the abb_ldoH. Nikolaus Schaller
See DM3730,DM275 data sheet (SPRS685B) footnote (6) in Table 4-19 which says that ABB must be switched to FBB mode when using the OPP1G. The LOD definition abb_mpu_iva already exists so that we need to add plumbing for vbb-supply = <&abb_mpu_iva> and define two voltage vectors for each OPP so that the abb LDO is also updated by the ti-cpufreq driver. We also must switch the ti_cpufreq_soc_data to multi_regulator. Note: reading out the abb reglator voltage to verify that it does do transitions can be done by cat /sys/devices/platform/68000000.ocp/483072f0.regulator-abb-mpu/regulator/regulator.*/microvolts Likewise, read the twl4030 provided VDD voltage by cat /sys/devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:regulator-vdd1/regulator/regulator.*/microvolts Note: to check if the ABB FBB is enabled/disabled, check registers PRM_LDO_ABB_CTRL 0x483072F4 bit 3:0 1=bypass 5=FBB PRM_LDO_ABB_SETUP 0x483072F0 0x00=bypass 0x11=FBB e.g. /dev/mem opened. Memory mapped at address 0xb6fe4000. Value at address 0x483072F4 (0xb6fe42f4): 0x3205 /dev/mem opened. Memory mapped at address 0xb6f89000. Value at address 0x483072F4 (0xb6f892f4): 0x3201 Note: omap34xx and am3517 have/need no comparable LDO or mechanism. Suggested-by: Adam Ford <aford173@gmail.com> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-10ARM: dts: omap3: bulk convert compatible to be explicitly ti,omap3430 or ↵H. Nikolaus Schaller
ti,omap3630 or ti,am3517 For the ti-cpufreq driver we need a clear separation between omap34 and omap36 families since they have different silicon revisions and efuses. So far ti,omap3630/ti,omap36xx is just an additional flag to ti,omap3 while omap34 has no required entry. Therefore we can not match omap34 boards properly. This needs to add ti,omap3430 and ti,omap3630 where it is missing. We also clean up some instances of missing ti,am3517 so that we can rely on seeing either one of: ti,am3517 ti,omap3430 ti,omap3630 in addition to ti,omap3. We leave ti,omap34xx and ti,omap36xx untouched for compatibility. The script to do the conversion is: manually fix am3517_mt_ventoux.dts find arch/arm/boot/dts -name '*.dts*' -exec fgrep -q '"ti,omap34xx"' {} \; ! -exec fgrep -q '"ti,omap3430"' {} \; -exec sed -i '' 's/"ti,omap34xx"/"ti,omap3430", "ti,omap34xx"/' {} \; find arch/arm/boot/dts -name '*.dts*' -exec fgrep -q '"ti,omap36xx"' {} \; ! -exec fgrep -q '"ti,omap3630"' {} \; -exec sed -i '' 's/"ti,omap36xx"/"ti,omap3630", "ti,omap36xx"/' {} \; find arch/arm/boot/dts \( -name 'omap*.dts*' -o -name 'logic*.dts*' \) -exec fgrep -q '"ti,omap3"' {} \; ! -exec fgrep -q '"ti,omap3630"' {} \; ! -exec fgrep -q '"ti,omap36xx"' {} \; ! -exec fgrep -q '"ti,am3517"' {} \; ! -exec fgrep -q '"ti,omap34xx"' {} \; ! -exec fgrep -q '"ti,omap3430"' {} \; -exec sed -i '' 's/"ti,omap3"/"ti,omap3430", "ti,omap3"/' {} \; So if your out-of-tree omap3 board does not show any OPPs, please check the compatibility entry and update if needed. Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-10ARM: dts: omap34xx & omap36xx: replace opp-v1 tables by opp-v2 forH. Nikolaus Schaller
With the driver installed, we can change the opp-v1 table format to opp-v2. In addition, move omap3 from whitelist to blacklist in cpufreq-dt-platdev in the same patch, because doing either first breaks operation and may make trouble in bisect. We also can remove opp-v1 table for omap3-n950-n9 since its 1GHz capability is now automatically detected. We also fix a wrong OPP4 voltage for omap3430 which must be 0.6V + 54*12.5mV = 1275mV. Otherwise the twl4030 driver will reject this OPP. Note: the high speed OPPs that were not available in the opp-v1 tables are tagged "turbo-mode;" which means they are not automatically activated by the govenors or cpu-freq. To enable you have to write echo 1 >/sys/devices/system/cpu/cpufreq/boost Note: to hard disable an OPP in a board.dts file use e.g. &cpu0_opp_table: { /delete-node/ opp1g-1000000000; /* do not use */ }; or alternatively: &cpu0_opp_table: { opp1g-1000000000 { status = "disabled"; /* do not use */ }; }; Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Adam Ford <aford173@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2019-10-09ARM: mm: alignment: use "u32" for 32-bit instructionsRussell King
Rather than using "unsigned long", use "u32" for 32-bit instructions in the alignment fault handler. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-09ARM: mm: fix alignment handler faults under memory pressureRussell King
When the system has high memory pressure, the page containing the instruction may be paged out. Using probe_kernel_address() means that if the page is swapped out, the resulting page fault will not be handled because page faults are disabled by this function. Use get_user() to read the instruction instead. Reported-by: Jing Xiangfeng <jingxiangfeng@huawei.com> Fixes: b255188f90e2 ("ARM: fix scheduling while atomic warning in alignment handling code") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2019-10-09ARM: dts: Add minimal support for Droid Bionic xt875Tony Lindgren
We already have folks booting Droid Bionic with Droid 4 dts, but it is a different hardware with no keyboard. Let's start adding device specific support for Droid bionic by making current omap4-droid4-xt894 a common file and including it. Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-09ARM: dts: omap4-droid4: Allow 300mA current for USB peripheralsTony Lindgren
Looks like we can use some USB Ethernet dongles for example if we increase the allowed power limit. A similar PMIC MC13783 documents maximum current limit as 300 mA in in "Table 10-4. VBUS Regulator Main Characteristics". Since we have no other documentation, let's use that value as the limit. Cc: Jacopo Mondi <jacopo@jmondi.org> Cc: Marcel Partap <mpartap@gmx.net> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Michael Scott <hashcode0f@gmail.com> Cc: NeKit <nekit1000@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-09ARM: dts: Use level interrupt for omap4 & 5 wlcoreTony Lindgren
Commit 572cf7d7b07d ("ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt") changed wlcore interrupts to use edge interrupt based on what's specified in the wl1835mod.pdf data sheet. However, there are still cases where we can have lost interrupts as described in omap_gpio_unidle(). And using a level interrupt instead of edge interrupt helps as we avoid the check for untriggered GPIO interrupts in omap_gpio_unidle(). And with commit e6818d29ea15 ("gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup") GPIOs idle just fine with level interrupts. Let's change omap4 and 5 wlcore users back to using level interrupt instead of edge interrupt. Let's not change the others as I've only seen this on omap4 and 5, probably because the other SoCs don't have l4per idle independent of the CPUs. Fixes: 572cf7d7b07d ("ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt") Depends-on: e6818d29ea15 ("gpio: gpio-omap: configure edge detection for level IRQs for idle wakeup") Cc: Anders Roxell <anders.roxell@linaro.org> Cc: Eyal Reizer <eyalr@ti.com> Cc: Guy Mishol <guym@ti.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-09ARM: multi_v7_defconfig: Enable Exynos bus and memory frequency scaling ↵Krzysztof Kozlowski
(devfreq) Enable devfreq events along with drivers for scaling frequency and voltages of Exynos buses and Dynamic Memory Controller (DMC). This usually brings energy saving benefits. So far devfreq was disabled because it was causing hangs during system reboot (voltage not matching reset frequency). This was already fixed. Occasionally, devfreq might negatively impact performance of certain SoC blocks, e.g. when a bus is scaled down but some block (like Mixer with two Full HD windows) wants to perform high-throughput DMA operations. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-09ARM: multi_v7_defconfig: Enable options for boards with Exynos SoCKrzysztof Kozlowski
Sync with exynos_defconfig and enable following options for Samsung Exynos SoC based boards: 1. NFC_S3FWRN5_I2C (with NFC stack): Samsung S3FWRN5 NCI NFC Controller, used for example on Exynos5433 (if booted in 32-bit mode), 2. S3C2410_WATCHDOG: watchdog driver used on S3C, S5P and Exynos SoCs, 3. REGULATOR_S2MPA01: Samsung S2MPA01 regulators driver present on Exynos5260 RexNos REX-RED board, 4. SND_SOC_ARNDALE: sound support on Arndale boards, 5. EXYNOS_IOMMU: IOMMU driver used on all Exynos SocS,, 6. EXTCON_MAX14577, EXTCON_MAX77693 and EXTCON_MAX8997: extcon drivers for handling micro USB on mobile Samsung boards (Trats, Trats2, Rinato), 7. PHY_EXYNOS5250_SATA: SATA phy for Exynos5250 present on Arndale and SMDK5250 boards. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-09soc: ti: add initial PRM driver with reset control supportTero Kristo
Add initial PRM (Power and Reset Management) driver for TI OMAP class SoCs. Initially this driver only supports reset control, but can be extended to support rest of the functionality, like powerdomain control, PRCM irq support etc. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-08ARM: dts: s3c64xx: Fix init order of clock providersLihua Yao
fin_pll is the parent of clock-controller@7e00f000, specify the dependency to ensure proper initialization order of clock providers. without this patch: [ 0.000000] S3C6410 clocks: apll = 0, mpll = 0 [ 0.000000] epll = 0, arm_clk = 0 with this patch: [ 0.000000] S3C6410 clocks: apll = 532000000, mpll = 532000000 [ 0.000000] epll = 24000000, arm_clk = 532000000 Cc: <stable@vger.kernel.org> Fixes: 3f6d439f2022 ("clk: reverse default clk provider initialization order in of_clk_init()") Signed-off-by: Lihua Yao <ylhuajnu@outlook.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-08ARM: dts: am3874-iceboard: Fix 'i2c-mux-idle-disconnect' usageAndrey Smirnov
According to Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt, i2c-mux-idle-disconnect is a property of a parent node since it pertains to the mux/switch as a whole, so move it there and drop all of the concurrences in child nodes. Fixes: d031773169df ("ARM: dts: Adds device tree file for McGill's IceBoard, based on TI AM3874") Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Graeme Smecher <gsmecher@threespeedlogic.com> Cc: linux-omap@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Tested-by: Graeme Smecher <gsmecher@threespeedlogic.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08ARM: dts: omap5: fix gpu_cm clock provider nameTero Kristo
The clkctrl code searches for the parent clockdomain based on the name of the CM provider node. The introduction of SGX node for omap5 made the node name for the gpu_cm to be clock-controller. There is no clockdomain named like this, so the lookup fails. Fix by changing the node name properly. Fixes: 394534cb07d8 ("ARM: dts: Configure sgx for omap5") Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08ARM: dts: armada-xp: add label to sdram-controller nodeChris Packham
Add the label "sdramc" to the sdram-controller nodes for the Armada-XP and 98dx3236 SoCs. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-08ARM: dts: mvebu: add sdram controller node to Armada-38xChris Packham
The Armada-38x uses an SDRAM controller that is compatible with the Armada-XP. The key difference is the width of the bus (XP is 64/32, 38x is 32/16). The SDRAM controller registers are the same between the two SoCs. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-08ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xgChris Packham
Enable L2 cache parity and ECC on the db-xc3-24g4xg board so that cache operations are protected and errors can be flagged to the EDAC subsystem. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-08ARM: dts: dove: Rename "sa-sram" node to "sram"Krzysztof Kozlowski
The device node name should reflect generic class of a device so rename the "sa-sram" node to "sram". This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-08ARM: dts: kirkwood: synology: Fix rs5c372 RTC entryWalter Schweizer
In the rtc-rs5c372.c driver the compatible entry has been renamed from rs5c372 to rs5c372a. Most dts files have been adapted. This patch completes the change. Signed-off-by: Walter Schweizer <ws.kernel@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-07ARM: configs: keystone: enable cptsGrygorii Strashko
Enable CPTS support which is present in Network Coprocessor Gigabit Ethernet (GbE) Switch Subsystem. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: dts: k2l-netcp: add cpts refclk_mux nodeGrygorii Strashko
KeyStone 66AK2L 1G Ethernet Switch Subsystems, can control an external multiplexer that selects one of up to 32 clocks for time sync reference (RFTCLK) clock. This feature can be configured through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module and modelled as multiplexer clock. Hence, add cpts-refclk-mux clock node which allows to mux one of SYSCLK2, SYSCLK3, TIMI0, TIMI1, TSREFCLK clocks as CPTS reference clock [1] and group all CPTS properties under "cpts" subnode. [1] http://www.ti.com/lit/gpn/66ak2l06 Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: dts: k2hk-netcp: add cpts refclk_mux nodeGrygorii Strashko
KeyStone 66AK2H/K 1G Ethernet Switch Subsystems, can control an external multiplexer that selects one of up to 32 clocks for time sync reference (RFTCLK) clock. This feature can be configured through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module and modelled as multiplexer clock. Hence, add cpts-refclk-mux clock node which allows to mux one of SYSCLK2, SYSCLK3, TIMI0, TIMI1, TSREFCLK clocks as CPTS reference clock [1] and group all CPTS properties under "cpts" subnode. [1] http://www.ti.com/lit/gpn/66ak2h14 Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: dts: k2e-netcp: add cpts refclk_mux nodeGrygorii Strashko
KeyStone 66AK2E 1G Ethernet Switch Subsystems, can control an external multiplexer that selects one of up to 32 clocks for time sync reference (RFTCLK) clock. This feature can be configured through CPTS_RFTCLK_SEL register (offset: x08) in CPTS module and modelled as multiplexer clock. Hence, add cpts-refclk-mux clock node which allows to mux one of SYSCLK2, SYSCLK3, TIMI0, TIMI1, TSIPCLKA, TSREFCLK, TSIPCLKB clocks as CPTS reference clock [1] and group all CPTS properties under "cpts" subnode. [1] http://www.ti.com/lit/gpn/66ak2e05 Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: dts: k2e-clocks: add input ext. fixed clocks tsipclka/bGrygorii Strashko
Add set of fixed, external input clocks definitions for TSIPCLKA, TSIPCLKB clocks. Such clocks can be used as reference clocks for some HW modules (as cpts, for example) by configuring corresponding clock muxes. For these clocks real frequencies have to be defined in board files. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: dts: keystone-clocks: add input fixed clocksGrygorii Strashko
Add set of fixed, external input clocks definitions for TIMI0, TIMI1, TSREFCLK clocks. Such clocks can be used as reference clocks for some HW modules (as cpts, for example) by configuring corresponding clock muxes. For these clocks real frequencies have to be defined in board files. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2019-10-07ARM: qcom_defconfig: add ocmem supportBrian Masney
Add ocmem driver that's needed for some a3xx and a4xx based systems. Signed-off-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-07ARM: dts: imx6qdl-wandboard: add ethernet PHY descriptionAnatolij Gustschin
Wandboard devicetrees lack the ethernet PHY description, add it. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-07ARM: dts: sun7i: Drop the module clock from the device treeMaxime Ripard
What we thought would be the module clock is actually the clock meant to be used by the sensors, and play no role in the CSI controller. Now that the binding has been updated to reflect that, let's update the device tree too. Fixes: d2b9c6444301 ("ARM: dts: sun7i: Add CSI0 controller") Reported-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <mripard@kernel.org>
2019-10-07ARM: dts: imx6q-dhcom: Enable CAN in board DTSMarek Vasut
Move the CAN enablement from SoM DTSi to board DTS, as each board might need different CAN configuration. Moreover, disable CAN2 on the PDK2 as it is not available on any connector. This also fixes on-SoM SD slot operation, as it shares pins with the CAN2. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Ludwig Zenz <lzenz@dh-electronics.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com> To: linux-arm-kernel@lists.infradead.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06ARM: dts: qcom: pm8941: add 5vs2 regulator nodeBrian Masney
pm8941 is missing the 5vs2 regulator node so let's add it since its needed to get the external display working. This regulator was already configured in the interrupts property on the parent node. Note that this regulator is referred to as mvs2 in the downstream MSM kernel sources. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-10-06ARM: dts: exynos: Rename SysRAM node to "sram"Krzysztof Kozlowski
The device node name should reflect generic class of a device so rename the SysRAM node from "sysram" to "sram". The child nodes stay as before as "smp-sysram" to match their real purpose. This will be also in sync with upcoming DT schema. No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-06ARM: dts: exynos: Rename power domain nodes to "power-domain" in Exynos4Krzysztof Kozlowski
The device node name should reflect generic class of a device so rename power domain nodes to "power-domain". No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-06ARM: dts: imx7d: Add opp-suspend propertyAnson Huang
Add "opp-suspend" property for i.MX7D to make sure system suspend with max available opp. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06ARM: dts: imx7d: Correct speed grading fuse settingsAnson Huang
The 800MHz opp speed grading fuse mask should be 0xd instead of 0xf according to fuse map definition: SPEED_GRADING[1:0] MHz 00 800 01 500 10 1000 11 1200 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06ARM: dts: imx6qdl-gw551x: Do not use 'simple-audio-card,dai-link'Fabio Estevam
According to Documentation/devicetree/bindings/sound/simple-card.txt the 'simple-audio-card,dai-link' may be omitted when the card has only one DAI link, which is the case here. Get rid of 'simple-audio-card,dai-link' in order to fix the following build warning with W=1: arch/arm/boot/dts/imx6qdl-gw551x.dtsi:109.32-121.5: Warning (unit_address_vs_reg): /sound-digital/simple-audio-card,dai-link@0: node has a unit name, but no reg property Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06ARM: dts: imx6ul-phytec-phycore-som: Add missing unit nameFabio Estevam
Pass the memory unit name in order to fix the following build warning with W=1: arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi:23.9-26.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Cc: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-06ARM: dts: imx: Replace "simple-bus" with "simple-mfd" for anatopFabio Estevam
Replace "simple-bus" with "simple-mfd" for anatop node in order to fix the following build warnings with W=1: arch/arm/boot/dts/imx6sx.dtsi:603.31-616.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-1p1: missing or empty reg/ranges property arch/arm/boot/dts/imx6sx.dtsi:618.31-631.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-3p0: missing or empty reg/ranges property arch/arm/boot/dts/imx6sx.dtsi:633.31-646.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-2p5: missing or empty reg/ranges property arch/arm/boot/dts/imx6sx.dtsi:648.32-663.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddcore: missing or empty reg/ranges property arch/arm/boot/dts/imx6sx.dtsi:665.33-679.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddpcie: missing or empty reg/ranges property arch/arm/boot/dts/imx6sx.dtsi:681.31-696.7: Warning (simple_bus_reg): /soc/aips-bus@2000000/anatop@20c8000/regulator-vddsoc: missing or empty reg/ranges property Based on a patch from Marco Felsch for the imx6qdl.dtsi. Cc: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-05Merge tag 'armsoc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "A few fixes this time around: - Fixup of some clock specifications for DRA7 (device-tree fix) - Removal of some dead/legacy CPU OPP/PM code for OMAP that throws warnings at boot - A few more minor fixups for OMAPs, most around display - Enable STM32 QSPI as =y since their rootfs sometimes comes from there - Switch CONFIG_REMOTEPROC to =y since it went from tristate to bool - Fix of thermal zone definition for ux500 (5.4 regression)" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: multi_v7_defconfig: Fix SPI_STM32_QSPI support ARM: dts: ux500: Fix up the CPU thermal zone arm64/ARM: configs: Change CONFIG_REMOTEPROC from m to y ARM: dts: am4372: Set memory bandwidth limit for DISPC ARM: OMAP2+: Fix warnings with broken omap2_set_init_voltage() ARM: OMAP2+: Add missing LCDC midlemode for am335x ARM: OMAP2+: Fix missing reset done flag for am3 and am43 ARM: dts: Fix gpio0 flags for am335x-icev2 ARM: omap2plus_defconfig: Enable more droid4 devices as loadable modules ARM: omap2plus_defconfig: Enable DRM_TI_TFP410 DTS: ARM: gta04: introduce legacy spi-cs-high to make display work again ARM: dts: Fix wrong clocks for dra7 mcasp clk: ti: dra7: Fix mcasp8 clock bits
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