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2019-10-30ARM: dts: Configure omap3 rngTony Lindgren
Looks like omap3 RNG is similar to the omap2 rng, let's get it working by configring the dts node for it. We must also add rng_ick to core_l4_clkdm as noted by Adam Ford. And please note that the RNG is likely disabled on HS devices. At least n900 does not have it accessible, and instead omap3-rom-rng driver must be used. So let's tag RNG as disabled on n900 as noted by Pali Rohár <pali.rohar@gmail.com>. On am3517 at least the clocks need to be configured to get it working as noted by Adam Ford, so let's tag it disabled for now. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Adam Ford <aford173@gmail.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Sebastian Reichel <sre@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com> #logicpd-torpedo-37xx-devkit Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-29ARM: tegra: cardhu-a04: Add CPU Operating Performance PointsDmitry Osipenko
Utilize common Tegra30 CPU OPP table. CPU DVFS is available now on Cardhu A04. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: cardhu-a04: Set up voltage regulators for DVFSDmitry Osipenko
Set minimum and maximum voltages, and couple CPU/CORE regulators. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: trimslice: Add CPU Operating Performance PointsDmitry Osipenko
Utilize common Tegra20 CPU OPP table. CPU voltage scaling is available now on TrimSlice. Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: paz00: Add CPU Operating Performance PointsDmitry Osipenko
Utilize common Tegra20 CPU OPP table. CPU DVFS is available now on AC100. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: paz00: Set up voltage regulators for DVFSDmitry Osipenko
Set minimum and maximum voltages, and couple CPU/CORE/RTC regulators. Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add CPU Operating Performance Points for Tegra30Dmitry Osipenko
Operating Point are specified per HW version. The OPP voltages are kept in a separate DTSI file because some boards may not define CPU regulator in their device-tree if voltage scaling isn't necessary for them. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add CPU Operating Performance Points for Tegra20Dmitry Osipenko
Operating Point are specified per HW version. The OPP voltages are kept in a separate DTSI file because some boards may not define CPU regulator in their device-tree if voltage scaling isn't necessary, like for example in a case of tegra20-trimslice which is outlet-powered device. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add Tegra30 CPU clockDmitry Osipenko
All "geared" CPU cores share the same CPU clock. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add Tegra20 CPU clockDmitry Osipenko
All CPU cores share the same CPU clock. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add External Memory Controller node on Tegra30Dmitry Osipenko
Add External Memory Controller node to the device-tree. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: nyan-big: Add timings for RAM codes 4 and 6Dmitry Osipenko
Add timings for RAM codes 4 and 6 and a timing for 528mHz of RAM code 1, which was missed due to the clock driver bug that is fixed now in all of stable kernels. Tested-by: Steev Klimaszewski <steev@kali.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Connect SMMU with Video Decoder Engine on Tegra30Dmitry Osipenko
Enable IOMMU support for the video decoder. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add eDP power supplies on Venice2Thierry Reding
The power supplies needed to drive eDP on Venice2 were never hooked up, so things only worked because those regulators are already enabled by other devices. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add SOR0_OUT clock on Tegra124Thierry Reding
This clock is needed for eDP to properly function, so add it to the SOR device tree node. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Add stmpe-adc DT node to Toradex T30 modulesPhilippe Schenker
Add the stmpe-adc DT node as found on Toradex T30 modules Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Use WFE for power-gating on Tegra30Dmitry Osipenko
Turned out that WFI doesn't work reliably on Tegra30 as a trigger for the power-gating, it causes CPU hang under some circumstances like having memory controller running of PLLP. The TRM doc states that WFI should be used for the Big-Little "Cluster Switch", while WFE for the power-gating. Hence let's use the WFE for CPU0 power-gating, like it is done for the power-gating of a secondary cores. This fixes CPU hang after entering LP2 with memory running off PLLP. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()Dmitry Osipenko
There is an unfortunate typo in the code that results in writing to FLOW_CTLR_HALT instead of FLOW_CTLR_CSR. Cc: <stable@vger.kernel.org> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: tegra: Enable Tegra VDE driver in tegra_defconfigDmitry Osipenko
The video decoder driver was tested by time and works absolutely fine. The reason why it is in staging is because it doesn't provide common V4L interface yet, this shouldn't stop driver enabling in the defconfig since our userspace (libvdpau-tegra) provides combined acceleration of decoding and displaying without use of V4L. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29ARM: sunxi: Fix CPU powerdown on A83TOndrej Jirman
PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this patch, instead of gating the CPU0, the whole cluster was power gated, when shutting down first CPU in the cluster. Fixes: 6961275e72a8c1 ("ARM: sun8i: smp: Add support for A83T") Signed-off-by: Ondrej Jirman <megous@megous.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Cc: stable@vger.kernel.org Signed-off-by: Maxime Ripard <mripard@kernel.org>
2019-10-29ARM: dts: sun8i-a83t-tbs-a711: Fix WiFi resume from suspendOndrej Jirman
Without enabling keep-power-in-suspend, we can't wake the device up using WOL packet, and the log is flooded with these messages on resume: sunxi-mmc 1c10000.mmc: send stop command failed sunxi-mmc 1c10000.mmc: data error, sending stop command sunxi-mmc 1c10000.mmc: send stop command failed sunxi-mmc 1c10000.mmc: data error, sending stop command So to make the WiFi really a wakeup-source, we need to keep it powered during suspend. Fixes: 0e23372080def7 ("arm: dts: sun8i: Add the TBS A711 tablet devicetree") Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <mripard@kernel.org>
2019-10-29ARM: imx_v6_v7_defconfig: Enable CONFIG_TOUCHSCREEN_DA9052Fabio Estevam
Enable the CONFIG_TOUCHSCREEN_DA9052 option, so that touchscreen can be functional by default on imx53-qsb. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: exynos: Enable exynos-asv driver for ARCH_EXYNOSSylwester Nawrocki
Enable exynos-asv driver for Exynos 32-bit SoCs. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-28ARM: s3c: Rename s5p_usb_phy functionsKrzysztof Kozlowski
The name s5p_usb_phy_init() suggests it is shared with S5Pv210 platform, but it is not. It is specific to S3C64xx, so make it clear in the name. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-28ARM: s3c: Rename s3c64xx_spi_setname() functionKrzysztof Kozlowski
The name s3c64xx_spi_setname() suggests it is shared with S3C64xx platform, but except of contents it is not. It is called only by S3C24xx code, so make it clear in the name. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-10-28Merge tag 'stm32-dt-for-v5.5-1' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v5.5, round 1 Highlights: ---------- MPU part: -Add and enable ADC support on stm32mp157a-dk1 -Add DAC support on stm32mp157c-ed1 -Add and enable VREFBUF support on stm32mp157a-dk1 -Add focaltech touchscreen on stm32mp157c-dk2 -Add hdmi support on stm32mp157a-dk1 -Fix issues seen during YAML DT validation -Fix regulators issues for all MPU boards MCU part: -Fix issues seen during YAML DT validation * tag 'stm32-dt-for-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: remove useless dma-ranges property for stm32f469 ARM: dts: stm32: remove useless dma-ranges property for stm32f429 ARM: dts: stm32: disable active-discharge for vbus_otg on stm32mp157a-avenger96 ARM: dts: stm32: Fix active discharge usage on stm32mp157 ARM: dts: stm32: change default minimal buck1 value on stm32mp157 ARM: dts: stm32: add PWR regulators support on stm32mp157 ARM: dts: stm32: remove useless interrupt from dsi node for stm32f469 ARM: dts: stm32: add hdmi audio support to stm32mp157a-dk1 board ARM: dts: stm32: Add DAC support to stm32mp157c-ed1 ARM: dts: stm32: Add DAC pins used on stm32mp157c-ed1 ARM: dts: stm32: fix regulator-sd_switch node on stm32mp157c-ed1 board ARM: dts: stm32: remove usb phy-names entries on stm32mp157c-ev1 ARM: dts: stm32: fix joystick node on stm32f746 and stm32mp157c eval boards ARM: dts: stm32: fix memory nodes to match with DT validation tool ARM: dts: stm32: add focaltech touchscreen on stm32mp157c-dk2 board ARM: dts: stm32: enable ADC support on stm32mp157a-dk1 ARM: dts: stm32: add ADC pins used on stm32mp157a-dk1 ARM: dts: stm32: Enable VREFBUF on stm32mp157a-dk1 ARM: dts: stm32: move ltdc pinctrl on stm32mp157a dk1 board Link: https://lore.kernel.org/r/02c39510-f36d-abbb-c76f-49aff07c0a08@st.com Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-28KVM: arm/arm64: Show halt poll counters in debugfsChristian Borntraeger
ARM/ARM64 has counters halt_successful_poll, halt_attempted_poll, halt_poll_invalid, and halt_wakeup but never exposed those in debugfs. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1572164390-5851-1-git-send-email-borntraeger@de.ibm.com
2019-10-28ARM: imx: Add serial number support for i.MX6/7 SoCsAnson Huang
i.MX6/7 SoCs have a 64-bit SoC unique ID stored in OCOTP, it can be used as SoC serial number, add this support for i.MX6Q/6DL/6SL/6SX/6SLL/6UL/6ULL/6ULZ/7D, see below example on i.MX6Q: root@imx6qpdlsolox:~# cat /sys/devices/soc0/serial_number 240F31D4E1FDFCA7 Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx53-qsb: Use DRM bindings for the Seiko 43WVF1G panelFabio Estevam
Currently the parallel panel that is supported is the CLAA WVGA panel, which is the one that comes with the i.MX51 Babbage board. The default parallel panel that goes with the imx53-qsb board is the Seiko 43WVF1G LCD, so switch to the Seiko one. While at it convert to DRM bindings. The parallel display still remains disabled as the default display port is the TVE output. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx53: Spelling s/configration/configuration/Geert Uytterhoeven
Fix misspelling of "configuration". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6ul-14x14-evk: Assign power supplies for magnetometerAnson Huang
On i.MX6UL 14x14 EVK board, mag3110's power is controlled by sensor regulator, assign power supplies for mag3110 driver to do power management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6ul-14x14-evk: Fix the magnetometer node nameAnson Huang
Node name is supposed to be generic, use "magnetometer" instead of "mag3110" for magnetometer node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6ul-14x14-evk: Add sensors' GPIO regulatorAnson Huang
On i.MX6UL 14x14 EVK board, sensors' power are controlled by GPIO5_IO02, add GPIO regulator for sensors to manage their power. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6ul: Disable gpt2 by defaultAnson Huang
i.MX GPT driver ONLY supports 1 instance, i.MX6UL already has GPT1 enabled by default, so GPT2 should be disabled. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx7d: Add missing cooling device properties for CPUsAnson Huang
The cooling device properties "#cooling-cells" should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6dl: Add missing cooling device properties for CPUsAnson Huang
The cooling device properties "#cooling-cells" should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6q: Add missing cooling device properties for CPUsAnson Huang
The cooling device properties "#cooling-cells" should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6dev: use DRM bindingsSébastien Szymanski
Describe the parallel LCD using simple panel driver. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6dev: add backlight supportSébastien Szymanski
Add PWM backlight support. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6dev: rename usb-h1-vbus regulator to 5VSébastien Szymanski
This regulator supplies other devices and not only usb host1 so rename it. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6dev: add RTC supportSébastien Szymanski
Add support of MCP79400 RTC. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6: fix WiFiSébastien Szymanski
These changes make the WiFi on the APF6 board work again. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6: add flow control to uart2Sébastien Szymanski
RTS/CTS lines are wired to the Bluetooth chip so add uart-has-rtscts property to uart2. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-apf6: add phy to fecSébastien Szymanski
Add the mdio bus and the phy to the fec-node. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-{apf6, apf6dev}: remove container node around pinctrl nodesSébastien Szymanski
Remove the function node around the pinctrl nodes that was obsoleted by commit 5fcdf6a7ed95 ("pinctrl: imx: Allow parsing DT without function nodes"). Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-{apf6, apf6dev}: switch boards to SPDX identifierSébastien Szymanski
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: imx: Drop imx_anatop_usb_chrg_detect_disable()Andrey Smirnov
With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger detect in mxs_phy_hw_init()") in tree all of the necessary charger setup is done by the USB PHY driver which covers all of the affected i.MX6 SoCs. NOTE: imx_anatop_usb_chrg_detect_disable() was also called for i.MX7D, but looking at its datasheet it appears to have a different USB PHY IP block, so executing i.MX6 charger disable configuration seems unnecessary. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peter Chen <peter.chen@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-zii-rdu2: Specify supplies for accelerometerAndrey Smirnov
Specify 'vdd' and 'vddio' supplies for accelerometer to avoid warnings during boot. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx6qdl-zii-rdu2: Fix accelerometer interrupt-namesAndrey Smirnov
According to Documentation/devicetree/bindings/iio/accel/mma8452.txt, the correct interrupt-names are "INT1" and "INT2", so fix them accordingly. While at it, modify the node to only specify "INT2" since providing two interrupts is not necessary or useful (the driver will only use one). Signed-off-by: Fabio Estevam <festevam@gmail.com> [andrew.smirnov@gmail.com modified the patch to drop INT1] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: linux-arm-kernel@lists.infradead.org, Cc: linux-kernel@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28ARM: dts: imx7ulp: Move usdhc clocks assignment to board DTAnson Huang
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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