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2025-06-24ARM: configs: sama5_defconfig: Select CONFIG_WILC1000_SDIOFabio Estevam
The at91-sama5d27_wlsom1 SoM has a WILC3000 Wifi chip populated, so select the CONFIG_WILC1000_SDIO by default. Signed-off-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20250617140502.1042812-2-festevam@gmail.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-23Revert "ARM: dts: Update pcie ranges for dra7"Frank Li
This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee. The commit being reverted updated the "ranges" property for the sake of readability. However, this change is no longer appropriate due to the following reasons: - On many SoCs, the PCIe parent bus translates CPU addresses to different values before passing them to the PCIe controller. - The reverted commit introduced a fake address translation, which violates the fundamental DTS principle: the device tree should reflect actual hardware behavior. Reverting this change prepares for the cleanup of the driver's cpu_addr_fixup() hook. Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20250411153454.3258098-1-Frank.Li@nxp.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-06-23ARM: dts: omap: am335x: Use non-deprecated rts-gpiosKrzysztof Kozlowski
The 'rts-gpio' (without trailing 's') is deprecated in favor of 'rts-gpios'. Kernel supports both variants, so switch the DTS to preferred one. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250514125158.56285-2-krzysztof.kozlowski@linaro.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-06-23crypto: arm/aes-neonbs - work around gcc-15 warningArnd Bergmann
I get a very rare -Wstringop-overread warning with gcc-15 for one function in aesbs_ctr_encrypt(): arch/arm/crypto/aes-neonbs-glue.c: In function 'ctr_encrypt': arch/arm/crypto/aes-neonbs-glue.c:212:1446: error: '__builtin_memcpy' offset [17, 2147483647] is out of the bounds [0, 16] of object 'buf' with type 'u8[16]' {aka 'unsigned char[16]'} [-Werror=array-bounds=] 212 | src = dst = memcpy(buf + sizeof(buf) - bytes, arch/arm/crypto/aes-neonbs-glue.c: In function 'ctr_encrypt': arch/arm/crypto/aes-neonbs-glue.c:218:17: error: 'aesbs_ctr_encrypt' reading 1 byte from a region of size 0 [-Werror=stringop-overread] 218 | aesbs_ctr_encrypt(dst, src, ctx->rk, ctx->rounds, bytes, walk.iv); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ arch/arm/crypto/aes-neonbs-glue.c:218:17: note: referencing argument 2 of type 'const u8[0]' {aka 'const unsigned char[]'} arch/arm/crypto/aes-neonbs-glue.c:218:17: note: referencing argument 3 of type 'const u8[0]' {aka 'const unsigned char[]'} arch/arm/crypto/aes-neonbs-glue.c:218:17: note: referencing argument 6 of type 'u8[0]' {aka 'unsigned char[]'} arch/arm/crypto/aes-neonbs-glue.c:36:17: note: in a call to function 'aesbs_ctr_encrypt' 36 | asmlinkage void aesbs_ctr_encrypt(u8 out[], u8 const in[], u8 const rk[], This could happen in theory if walk.nbytes is larger than INT_MAX and gets converted to a negative local variable. Keep the type unsigned like the orignal nbytes to be sure there is no integer overflow. Fixes: c8bf850e991a ("crypto: arm/aes-neonbs-ctr - deal with non-multiples of AES block size") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-06-22ARM: dts: at91-sama5d27_wlsom1: Improve the Wifi compatibleFabio Estevam
The at91-sama5d27_wlsom1 SoM has a WIL3000 Wifi SDIO device populated. Improve the description of the Wifi compatible string by passing the more specific "microchip,wilc3000" string. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20250617140502.1042812-1-festevam@gmail.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: gardena-smart-gateway: Fix power LEDEzra Buehler
When starting up, the GARDENA smart Gateway's power LED should be flashing green. It is unclear why this has not been done earlier. The LED frequency cannot be configured in the devicetree. Luckily, the default is 1 Hz, which is what we want. Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com> Link: https://lore.kernel.org/r/20250612074737.311346-1-ezra@easyb.ch Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sam9x7: Add clock name propertyRyan Wanner
Add clock-output-names to the xtal nodes, so the driver can correctly register the main and slow xtal. This fixes the issue of the SoC clock driver not being able to find the main xtal and slow xtal correctly causing a bad clock tree. Fixes: 41af45af8bc3 ("ARM: dts: at91: sam9x7: add device tree for SoC") Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/036518968ac657b93e315bb550b822b59ae6f17c.1750175453.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add clock name propertyRyan Wanner
Add clock-output-names to the xtal nodes, so the driver can correctly register the main and slow xtal. This fixes the issue of the SoC clock driver not being able to find the main xtal and slow xtal correctly causing a bad clock tree. Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT") Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/3878ae6d0016d46f0c91bd379146d575d5d336aa.1750175453.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7g5: Adjust clock xtal phandleRyan Wanner
Adjust clock xtal phandles to match the new xtal phandle formatting. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/8a9ece664958d07b1be73b4b6676a2a2ee397a94.1750175453.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sam9x7: Add HLCD controllerDharma Balasubiramani
Add support for HLCD controller. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Link: https://lore.kernel.org/r/20250611-sam9x7-dts-v1-1-7f52fcb488ad@microchip.com [claudiu.beznea: keep reg the 1st property on port@0 to comply with dts coding style] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Enable CAN busRyan Wanner
Enable CAN bus for SAMA7D65 curiosity board. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/ab719861de53432bdf19593fa4eee40adf57aed9.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Clean up extra spaceRyan Wanner
Remove the extra space that causes formatting issues. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/ac1decc35e2b4f706cf6ab9378f2c88e5295dde4.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add CAN bus supportRyan Wanner
Add support for CAN bus to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/f80a4206c05ed5d80a9527476963a18070ca42b6.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add PWM supportRyan Wanner
Add support for PWMs to the SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/195c69a19be1ff14736db402e0f1ee64438b4b20.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: sama7d65: Add crypto supportRyan Wanner
Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/fc791949c97f368f32a710e64d8db4018e45e70f.1749666053.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-22ARM: dts: microchip: use recent scl/sda gpio bindingsWolfram Sang
We have dedictaded bindings for scl/sda nowadays. Switch away from the deprecated plain 'gpios' property. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/20250519112107.2980-4-wsa+renesas@sang-engineering.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-06-19ARM: dts: renesas: r9a06g032: Add second clock input to RTCWolfram Sang
The external RTC clock is populated on the RZ/N1D module, so describe it and add a reference to the RTC node. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250604084211.28090-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-19ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe debug LEDsWolfram Sang
Enable the debug LEDs connected via the I2C GPIO extender. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250522080112.26050-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-06-19ARM: shmobile: defconfig: Refresh for v6.16-rc2Geert Uytterhoeven
Refresh the defconfig for Renesas ARM systems: - Disable CONFIG_DWMAC_RENESAS_GBETH, which defaults to yes since commit 461f6529e5946d98 ("net: stmmac: Add DWMAC glue layer for Renesas GBETH"), but is only used on Renesas ARM64 SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/f04a2b0e2c9128b4fa644850270b55493358be39.1750074375.git.geert+renesas@glider.be
2025-06-19ARM: dts: vf: vf610-zii-cfu1: rename node name *-gpio to *-gpiosFrank Li
Rename node name *-gpio to *-gpios to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dtb: sfp (sff,sff): 'los-gpio', 'tx-disable-gpio' do not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vf: vf-colibri-eval-v3: add power-supply for edt,et057090dhuFrank Li
Add power-supply for edt,et057090dhu to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-colibri-eval-v3.dtb: panel (edt,et057090dhu): 'power-supply' is a required property Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vf: rename io-expander@20 to pinctrl@20Frank Li
Rename io-expander@20 to pinctrl@20 to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-zii-dev-rev-c.dtb: sx1503@20 (semtech,sx1503q): $nodename:0: 'sx1503@20' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$ Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vf: remove redundant layer under iomuxFrank Li
Remove redundant layer under iomux and add grp surfix for pinmux node name to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-colibri-eval-v3.dtb: pinctrl@40048000 (fsl,vf610-iomuxc): Unevaluated properties are not allowed ('vf610-colibri' was unexpected) Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vf: remove redundant pinctrl-namesFrank Li
Remove redundant pinctrl-names because no pinctrl-0 node to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dtb: i2c-mux@71 (nxp,pca9548): 'pinctrl-0' is a dependency of 'pinctrl-names Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vf: remove reg property for arm pmuFrank Li
Remove reg property for arm pmu to align binding doc and move it under root node to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dtb: pmu@40089000 (arm,cortex-a5-pmu): 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: vfxxx: Correctly use two tuples for timer addressKrzysztof Kozlowski
Address and size-cells are 1 and the ftm timer node takes two address spaces in "reg" property, so this should be in two <> tuples. Change has no functional impact, but original code is confusing/less readable. Fixes: 07513e1330a9 ("ARM: dts: vf610: Add Freescale FlexTimer Module timer node.") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19ARM: dts: add ngpios for vf610 compatible gpio controllersHaibo Chen
After commit da5dd31efd24 ("gpio: vf610: Switch to gpio-mmio"), the vf610 GPIO driver no longer uses the static number 32 for gc->ngpio. This allows users to configure the number of GPIOs per port. And some gpio controllers did have less pads. So add 'ngpios' here, this can save some memory when request bitmap, and also show user more accurate information when use gpio tools. Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-13ARM: imx_v6_v7_defconfig: Select BT_HCIUART_BCMFabio Estevam
Select BT_HCIUART_BCM so that Bluetooth can work by default on a imx7s-warp board with a BCM43455 Wifi/Bluetooth chip. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-13ARM: dts: imx7s-warp: Improve the Wifi descriptionFabio Estevam
GPIO5_10 is connected to the BCM43455 WL_REG_ON pin and it is better descrbed via mmc-pwrseq-simple.yaml. Also improve the Wifi devicetree description by passing a compatible string that describes the BCM43455 presence as per brcm,bcm4329-fmac.yaml. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-13ARM: dts: imx7s-warp: Improve the Bluetooth descriptionFabio Estevam
GPIO5_17 is connected to the BCM43455 BT_REG_ON pin. Improve the Bluetooth devicetree description by using a more accurate description of the hardware as per brcm,bluetooth.yaml. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-12ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950Alexey Charkov
WonderMedia WM8850/WM8950 uses an ARM PL310 cache controller for its L2 cache, add it. The parameters have been deduced from vendor's U-boot environment variables, which the downstream code uses to initialize the controller. They set the following register values: aux = 0x3e440000 prefetch_ctrl = 0x70000007 Their initialization code also unconditionally sets the flags L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, so encode those too Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-5-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controllerAlexey Charkov
Set correct unit address of d800e400 for the via,vt8500-fb node in vt8500.dtsi. Note that the reg property contained a correct address, so it must have been a copy and paste error earlier. While here, also update its node name to a generic one. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-4-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ARM: dts: vt8500: Use generic node name for the SD/MMC controllerAlexey Charkov
Current guidelines recommend mmc@ node names, so use that instead. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-3-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ARM: dts: vt8500: Move memory nodes to board dts and fix addr/sizeAlexey Charkov
VIA/WonderMedia SoCs don't have on-chip memory, so their memory nodes are better placed in per-board dts rather than per-SoC dtsi. Move them accordingly, and also add correct node addresses and sizes for each of the boards. Some boards were also available with more memory than included in this commit - those would need a separate DT or an appropriate kernel cmdline argument to reflect it, as the bootloader on these devices doesn't handle DT at all nor does it any runtime discovery of available memory size. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-2-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ARM: dts: vt8500: Add node address and reg in CPU nodesAlexey Charkov
Adjust CPU nodes according to current guidelines, including address and reg. Set #address-cells accordingly. Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250515-wmt-dts-updates-v2-1-246937484cc8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-11ARM: dts: qcom: msm8974-sony-xperia-rhine: Add alias for mmc0 & mmc1Luca Weiss
Add an alias for the internal storage so it always becomes mmcblk0 and SD card becomes mmcblk1. This avoids issues with internal storage becoming mmcblk1 unexpectedly and aligns this board with other boards that use MMC storage. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-msm8974-mmc-alias-v2-3-1d8808478fba@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: qcom: msm8974-hammerhead: Add alias for mmc0Luca Weiss
Add an alias for the internal storage so it always becomes mmcblk0. This avoids issues with internal storage becoming mmcblk1 unexpectedly and aligns this board with other boards that use MMC storage. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-msm8974-mmc-alias-v2-2-1d8808478fba@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: qcom: msm8974-oneplus-bacon: Add alias for mmc0Luca Weiss
Add an alias for the internal storage so it always becomes mmcblk0. This avoids issues with internal storage becoming mmcblk1 unexpectedly and aligns this board with other boards that use MMC storage. Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-msm8974-mmc-alias-v2-1-1d8808478fba@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: qcom: Add initial support for Sony Xperia Z Ultra (togari)Kevin Widjaja
Add the dts for the Z Ultra. This is currently almost the same as Z1 Compact (amami) and Z1 (honami) as they share almost the same hardware. Only USB Networking and volume button are confirmed working. Signed-off-by: Kevin Widjaja <kevin.widjaja21@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-togari-v2-4-10e7b53b87c1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: qcom: msm8974-sony-xperia-rhine: Move camera buttons to amami & honamiKevin Widjaja
An upcoming board in the sony-xperia-rhine family (sony-togari) does not have dedicated camera buttons, so move those from common rhine dtsi to amami and honami dts files. Signed-off-by: Kevin Widjaja <kevin.widjaja21@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-togari-v2-2-10e7b53b87c1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: qcom: msm8974-sony-xperia-rhine: Enable USB chargingKevin Widjaja
Set usb-charge-current-limit to enable charging over USB for all sony-rhine devices. Signed-off-by: Kevin Widjaja <kevin.widjaja21@gmail.com> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250610-togari-v2-1-10e7b53b87c1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11mm: pgtable: fix pte_swp_exclusiveMagnus Lindholm
Make pte_swp_exclusive return bool instead of int. This will better reflect how pte_swp_exclusive is actually used in the code. This fixes swap/swapoff problems on Alpha due pte_swp_exclusive not returning correct values when _PAGE_SWP_EXCLUSIVE bit resides in upper 32-bits of PTE (like on alpha). Suggested-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Cc: Sam James <sam@gentoo.org> Link: https://lore.kernel.org/lkml/20250218175735.19882-2-linmag7@gmail.com/ Link: https://lore.kernel.org/lkml/20250602041118.GA2675383@ZenIV/ [ Applied as the 'sed' script Al suggested - Linus ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2025-06-11ARM: dts: qcom: msm8960: use macros for interruptsMax Shevchenko
Replace the raw values with macros. No changes to the output Tested-by: Rudraksha Gupta <guptarud@gmail.com> Signed-off-by: Max Shevchenko <wctrl@proton.me> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250606-msm8960-irq-macros-v1-1-03e573ba26d6@proton.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMCWillie Thai
The GB200NVL BMC is an Aspeed Ast2600 based BMC [1] for Nvidia Blackwell GB200NVL platform [2]. Co-developed-by: Mars Yang <maryang@nvidia.com> Signed-off-by: Mars Yang <maryang@nvidia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Rob Herring <robh@kernel.org> Cc: Paul Menzel <pmenzel@molgen.mpg.de> Cc: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://www.aspeedtech.com/server_ast2600/ [1] Link: https://nvdam.widen.net/s/wwnsxrhm2w/blackwell-datasheet-3384703 [2] Signed-off-by: Willie Thai <wthai@nvidia.com> Link: https://patch.msgid.link/20250401153955.314860-3-wthai@nvidia.com [arj: tidy commit message] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Enable MCTP support for NIC managementPotin Lai
Add the `mctp-controller` property and MCTP nodes to enable support for backend NIC management via PLDM over MCTP. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-10-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and addressPotin Lai
Revise the I2C bus and address for the Cable Backplane Cartridge (CBC) FRU EEPROM in the Catalina device tree. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-9-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Enable multi-master on additional I2C busesPotin Lai
Update the device tree to enable `multi-master` mode on I2C buses shared between the host BMC and the NV module with HMC. This ensures proper bus arbitration and coordination in multi-master environments, preventing communication conflicts and improving reliability. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-8-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodesPotin Lai
Remove INA238 and INA230 power sensor nodes from the device tree (DTS) due to incompatibility with the second-source ISL28022, which shares the same I2C address. Move the driver probe to userspace to handle sensor dynamically. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-7-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Add second source HSC node supportPotin Lai
Add device tree nodes for the XDP710 Hot-Swap Controller (HSC) to support the Power Distribution Board (PDB) with a second-source configuration. Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-6-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-06-11ARM: dts: aspeed: catalina: Add second source fan controller supportPotin Lai
Add device tree nodes for the NCT7363 fan controllers on the second-source Power Distribution Board (PDB). Signed-off-by: Potin Lai <potin.lai.pt@gmail.com> Link: https://patch.msgid.link/20250321-potin-catalina-dts-update-20250102-v6-5-4bd85efeb9b4@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>