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https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/arm
mvebu arm for 6.17 (part 1)
Use string choices helper in GPIO support code for legacy Orion based
platforms.
* tag 'mvebu-arm-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm: orion: use string choices helper
Link: https://lore.kernel.org/r/87jz48xzpz.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/arm
ARM: tegra: Core changes for v6.17-rc1
Fixes an issue when copying data to IRAM using memcpy() and use the
memcpy_toio() function instead.
* tag 'tegra-for-6.17-arm-core' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Use I/O memcpy to write to IRAM
Link: https://lore.kernel.org/r/20250711220943.2389322-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/arm
MediaTek mach ARM32 updates
This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.
In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.
* tag 'mtk-arm32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
ARM: mediatek: add MT6572 smp bring up code
ARM: mediatek: add board_dt_compat entry for the MT6572 SoC
Link: https://lore.kernel.org/r/20250711083656.33538-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The conversion to using the new GPIO line setter callbacks missed the
set_multiple() in this file. Convert it to using the new callback.
Fixes: 9c3782118a57 ("ARM: sa1100/gpio: use new line value setter callbacks")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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When KCOV is enabled all functions get instrumented, unless
the __no_sanitize_coverage attribute is used. To prepare for
__no_sanitize_coverage being applied to __init functions, we have to
handle differences in how GCC's inline optimizations get resolved. For
arm this exposed several places where __init annotations were missing
but ended up being "accidentally correct". Fix these cases and force
several functions to be inline with __always_inline.
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20250717232519.2984886-5-kees@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
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In preparation for Clang stack depth tracking for KSTACK_ERASE,
split the stackleak-specific cflags out of GCC_PLUGINS_CFLAGS into
KSTACK_ERASE_CFLAGS.
Link: https://lore.kernel.org/r/20250717232519.2984886-3-kees@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
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In preparation for adding Clang sanitizer coverage stack depth tracking
that can support stack depth callbacks:
- Add the new top-level CONFIG_KSTACK_ERASE option which will be
implemented either with the stackleak GCC plugin, or with the Clang
stack depth callback support.
- Rename CONFIG_GCC_PLUGIN_STACKLEAK as needed to CONFIG_KSTACK_ERASE,
but keep it for anything specific to the GCC plugin itself.
- Rename all exposed "STACKLEAK" names and files to "KSTACK_ERASE" (named
for what it does rather than what it protects against), but leave as
many of the internals alone as possible to avoid even more churn.
While here, also split "prev_lowest_stack" into CONFIG_KSTACK_ERASE_METRICS,
since that's the only place it is referenced from.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20250717232519.2984886-1-kees@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek mach ARM32 updates
This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.
In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.
* tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
ARM: dts: mediatek: add basic support for Lenovo A369i board
ARM: dts: mediatek: add basic support for JTY D101 board
ARM: dts: mediatek: add basic support for MT6572 SoC
dt-bindings: arm: mediatek: add boards based on the MT6572 SoC
dt-bindings: vendor-prefixes: add JTY
dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572
Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt
arm: dts: OMAP updates for v6.17
- new board support: Seeed BeagleBone Green Eco
- misc. fixups / cleanups
* tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
arm: dts: ti: omap: Fixup pinheader typo
ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching
arm: dts: omap: Add support for BeagleBone Green Eco board
dt-bindings: omap: Add Seeed BeagleBone Green Eco
arm: dts: omap: am335x-bone-common: Rename tps to generic pmic node
Revert "ARM: dts: Update pcie ranges for dra7"
ARM: dts: omap: am335x: Use non-deprecated rts-gpios
Link: https://lore.kernel.org/r/7h7c0gxczy.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.17, round 1
Highlights:
----------
- MPU:
- STM32MP13:
-Add Ethernet MAC adress efuse support.
- STMP32MP15:
- Add stm32mp157f-DK2 board support. This board embedds the same
conectivity devices, DDR ... than stm32mp157c-dk2.
However there are two differences: STM32MP157F SoC which allows
overdrive OPP and the SCMI support for system features like
clocks and regulators.
- STM32MP25:
- Fix tick timer for low power use cases.
- Add timer support.
* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
arm64: dts: st: remove empty line in stm32mp251.dtsi
arm64: dts: st: fix timer used for ticks
arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
ARM: dts: stm32: add stm32mp157f-dk2 board support
dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
arm64: defconfig: enable STM32 timers drivers
arm64: dts: st: add timer nodes on stm32mp257f-ev1
arm64: dts: st: add timer pins for stm32mp257f-ev1
arm64: dts: st: add timer nodes on stm32mp251
ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt
ASPEED devicetree updates for 6.17
Removed platforms:
- IBM's Swift BMC
New platforms:
- Meta's Santabarbara
Santabarbara is a compute node with an accelerator module
- NVIDIA's GB200NVL BMC
NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
NVLink-connected, liquid-cooled, rack-scale design.
Updated BMC platforms:
- Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
- Catalina (Meta): Various sensors added, MCTP support for NIC management
- Harma (Meta): Various sensors added
- System1 (IBM): IPMB and various GPIO-related updates
- Yosemite4 (Meta): GPIO names for UART mux select lines
The System1 series includes a devicetree binding patch for IPMI IPMB devices.
* tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits)
ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
dt-bindings: arm: aspeed: add Meta Santabarbara board
ARM: dts: aspeed: bletchley: enable USB PD negotiation
ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
ARM: dts: aspeed: harma: add mmc health
ARM: dts: aspeed: Harma: revise gpio bride pin for battery
ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
ARM: dts: aspeed: harma: add fan board I/O expander
ARM: dts: aspeed: harma: add E1.S power monitor
ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC
dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
ARM: dts: aspeed: catalina: Add second source HSC node support
ARM: dts: aspeed: catalina: Add second source fan controller support
ARM: dts: aspeed: catalina: Add fan controller support
...
Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.17
Just few cleanups based on dtbs_check.
* tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: s5pv210: Align i2c-gpio node names with dtschema
ARM: dts: exynos: Align i2c-gpio node names with dtschema
Link: https://lore.kernel.org/r/20250709191523.171359-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
VT8500 DTS ARM changes for v6.17
1. Several dtbs_check cleanups.
2. Add missing cache topology - L2 cache controller on WM8850/WM895.
* tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
ARM: dts: vt8500: Use generic node name for the SD/MMC controller
ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
ARM: dts: vt8500: Add node address and reg in CPU nodes
Link: https://lore.kernel.org/r/20250709184800.168462-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Patch series "kdump: crashkernel reservation from CMA", v5.
This series implements a way to reserve additional crash kernel memory
using CMA.
Currently, all the memory for the crash kernel is not usable by the 1st
(production) kernel. It is also unmapped so that it can't be corrupted by
the fault that will eventually trigger the crash. This makes sense for
the memory actually used by the kexec-loaded crash kernel image and initrd
and the data prepared during the load (vmcoreinfo, ...). However, the
reserved space needs to be much larger than that to provide enough
run-time memory for the crash kernel and the kdump userspace. Estimating
the amount of memory to reserve is difficult. Being too careful makes
kdump likely to end in OOM, being too generous takes even more memory from
the production system. Also, the reservation only allows reserving a
single contiguous block (or two with the "low" suffix). I've seen systems
where this fails because the physical memory is fragmented.
By reserving additional crashkernel memory from CMA, the main crashkernel
reservation can be just large enough to fit the kernel and initrd image,
minimizing the memory taken away from the production system. Most of the
run-time memory for the crash kernel will be memory previously available
to userspace in the production system. As this memory is no longer
wasted, the reservation can be done with a generous margin, making kdump
more reliable. Kernel memory that we need to preserve for dumping is
normally not allocated from CMA, unless it is explicitly allocated as
movable. Currently this is only the case for memory ballooning and zswap.
Such movable memory will be missing from the vmcore. User data is
typically not dumped by makedumpfile. When dumping of user data is
intended this new CMA reservation cannot be used.
There are five patches in this series:
The first adds a new ",cma" suffix to the recenly introduced generic
crashkernel parsing code. parse_crashkernel() takes one more argument to
store the cma reservation size.
The second patch implements reserve_crashkernel_cma() which performs the
reservation. If the requested size is not available in a single range,
multiple smaller ranges will be reserved.
The third patch updates Documentation/, explicitly mentioning the
potential DMA corruption of the CMA-reserved memory.
The fourth patch adds a short delay before booting the kdump kernel,
allowing pending DMA transfers to finish.
The fifth patch enables the functionality for x86 as a proof of
concept. There are just three things every arch needs to do:
- call reserve_crashkernel_cma()
- include the CMA-reserved ranges in the physical memory map
- exclude the CMA-reserved ranges from the memory available
through /proc/vmcore by excluding them from the vmcoreinfo
PT_LOAD ranges.
Adding other architectures is easy and I can do that as soon as this
series is merged.
With this series applied, specifying
crashkernel=100M craskhernel=1G,cma
on the command line will make a standard crashkernel reservation
of 100M, where kexec will load the kernel and initrd.
An additional 1G will be reserved from CMA, still usable by the production
system. The crash kernel will have 1.1G memory available. The 100M can
be reliably predicted based on the size of the kernel and initrd.
The new cma suffix is completely optional. When no
crashkernel=size,cma is specified, everything works as before.
This patch (of 5):
Add a new cma_size parameter to parse_crashkernel(). When not NULL, call
__parse_crashkernel to parse the CMA reservation size from
"crashkernel=size,cma" and store it in cma_size.
Set cma_size to NULL in all calls to parse_crashkernel().
Link: https://lkml.kernel.org/r/aEqnxxfLZMllMC8I@dwarf.suse.cz
Link: https://lkml.kernel.org/r/aEqoQckgoTQNULnh@dwarf.suse.cz
Signed-off-by: Jiri Bohac <jbohac@suse.cz>
Cc: Baoquan He <bhe@redhat.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Donald Dutile <ddutile@redhat.com>
Cc: Michal Hocko <mhocko@suse.cz>
Cc: Philipp Rudo <prudo@redhat.com>
Cc: Pingfan Liu <piliu@redhat.com>
Cc: Tao Liu <ltao@redhat.com>
Cc: Vivek Goyal <vgoyal@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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The memory controller node compatible string was incompletely specified
and used the fallback compatible. After commit 501be7cecec9
("dt-bindings: memory-controller: Define fallback compatible") however,
we need to fully specify the compatible string.
Fixes: 501be7cecec9 ("dt-bindings: memory-controller: Define fallback compatible")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202507011302.ZqNlBKWX-lkp@intel.com/
Link: https://lore.kernel.org/r/20250701175538.1633435-1-florian.fainelli@broadcom.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm into sunxi/dt-for-6.17
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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Since the reorganization of HD-audio drivers, Realtek and HDMI codec
drivers have been split. Update to the new Kconfigs to catch up.
Fixes: aeeb85f26c3b ("ALSA: hda: Split Realtek HD-audio codec driver")
Fixes: 73cd0490819d ("ALSA: hda/hdmi: Split vendor codec drivers")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/20250715170422.5162c666@canb.auug.org.au
Link: https://patch.msgid.link/20250715075237.28476-2-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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Instead of having the core code guess the note name for each regset,
use USER_REGSET_NOTE_TYPE() to pick the correct name from elf.h.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Kees Cook <kees@kernel.org>
Cc: Akihiko Odaki <akihiko.odaki@daynix.com>
Cc: linux-arm-kernel@lists.infradead.org
Reviewed-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>
Link: https://lore.kernel.org/r/20250701135616.29630-6-Dave.Martin@arm.com
Signed-off-by: Kees Cook <kees@kernel.org>
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Instead of exposing the arm-optimized SHA-1 code via arm-specific
crypto_shash algorithms, instead just implement the sha1_blocks()
library function. This is much simpler, it makes the SHA-1 library
functions be arm-optimized, and it fixes the longstanding issue where
the arm-optimized SHA-1 code was disabled by default. SHA-1 still
remains available through crypto_shash, but individual architectures no
longer need to handle it.
To match sha1_blocks(), change the type of the nblocks parameter of the
assembly functions from int to size_t. The assembly functions actually
already treated it as size_t.
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20250712232329.818226-8-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
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In order to bring up secondary CPUs main CPU write trampoline
code to SRAM. The trampoline code is written while secondary
CPUs are powered on (at least that true for RK3188 CPU).
Sometimes that leads to kernel hang. Probably because secondary
CPU execute trampoline code while kernel doesn't expect.
The patch moves SRAM initialization step to the point where all
secondary CPUs are powered down.
That fixes rarely hangs on RK3188:
[ 0.091568] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.091996] rockchip_smp_prepare_cpus: ncores 4
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Link: https://lore.kernel.org/r/20250703140453.1273027-1-al.kochet@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add embedded controller node to Pegatron Chagall device-tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250429061803.9581-5-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add a device-tree for the Asus Portable AiO P1801-T, which is a NVIDIA
Tegra30-based 2-in-1 detachable tablet, originally running Android.
The tablet was also sold together with a PC docking station as the
Transformer AiO P1801.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # P1801-T with dock
Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250616073947.13675-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This smartphone uses a MediaTek MT6572 system-on-chip with 512MB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-11-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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This tablet uses a MediaTek MT6572 system-on-chip with 1GB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-10-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Add basic support for the MediaTek MT6572 SoC.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-9-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Replace verbatim license text with a `SPDX-License-Identifier`.
The comment header mis-attributes this license to be "X11", but the
license text does not include the last line "Except as contained in this
notice, the name of the X Consortium shall not be used in advertising or
otherwise to promote the sale, use or other dealings in this Software
without prior written authorization from the X Consortium.". Therefore,
this license is actually equivalent to the SPDX "MIT" license (confirmed
by text diffing).
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Bence Csókás <csokas.bence@prolan.hu>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Rename QSPI NAND node to 'flash@0' in order to fix the following
dt-schema warning:
spi-flash@0 (spi-nand): $nodename:0: 'spi-flash@0' does not match '^(flash|.*sram|nand)(@.*)?$'
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Describe the partitions for the bootloader and the environment
on the SPI NOR. While at it also fix the order of the properties
in the flash node itself.
Signed-off-by: Eberhard Stoll <eberhard.stoll@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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The polarity of the DE signal of the transceiver is active-high for
sending. Therefore rs485-rts-active-low is wrong and needs to be
removed to make RS485 transmissions work.
Signed-off-by: Annette Kobou <annette.kobou@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Add support for booting the secondary CPU on the MT6572 SoC.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-8-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Add a compatible string for the MT6572 SoC.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-7-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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In future we intend to change the vm_flags_t type, so it isn't correct for
architecture and driver code to assume it is unsigned long. Correct this
assumption across the board.
Overall, this patch does not introduce any functional change.
Link: https://lkml.kernel.org/r/b6eb1894abc5555ece80bb08af5c022ef780c8bc.1750274467.git.lorenzo.stoakes@oracle.com
Signed-off-by: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Acked-by: Mike Rapoport (Microsoft) <rppt@kernel.org>
Acked-by: Christian Brauner <brauner@kernel.org>
Reviewed-by: Vlastimil Babka <vbabka@suse.cz>
Reviewed-by: Oscar Salvador <osalvador@suse.de>
Reviewed-by: Pedro Falcato <pfalcato@suse.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64]
Acked-by: Zi Yan <ziy@nvidia.com>
Acked-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Jann Horn <jannh@google.com>
Cc: Kees Cook <kees@kernel.org>
Cc: Liam R. Howlett <Liam.Howlett@oracle.com>
Cc: Jan Kara <jack@suse.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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Add device-tree for ASUS VivoTab RT TF600T, which is NVIDIA Tegra30-based
tablet device with Windows RT.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250617070320.9153-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Kasan crashes the kernel trying to check boundaries when using the
normal memcpy.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/r/20250522-mach-tegra-kasan-v1-1-419041b8addb@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This commit fixes a typo introduced in commit
ee368a10d0df ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names").
gpio0_7 is located on the P9 header on the BBB.
This was verified with a BeagleBone Black by toggling the pin and
checking with a multimeter that it corresponds to pin 42 on the P9
header.
Signed-off-by: Albin Törnqvist <albin.tornqvist@codiax.se>
Link: https://lore.kernel.org/r/20250624114839.1465115-2-albin.tornqvist@codiax.se
Fixes: ee368a10d0df ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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The wiring of the RS-485 transceiver of UART0 of the PDU-001 board
allows sending or receiving date exclusively. In other words: no
character transmitted will ever be received.
Hence the tx-filter counter in the OMAP serial driver can't work
correctly as it relies on receiving the transmitted characters.
This in turn will prevent reception of data unless we disable the
tx-filter counter.
This patch disables the tx-filter counter by enabling the DTS setting
rs485-rx-during-tx. This might sound like the opposite to be done but
it uses the enabling of rs485-rx-during-tx not for receiving the data
transmitted but for disabling the tx-fiter counter.
Tested-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Felix Brack <fb@ltec.ch>
Link: https://lore.kernel.org/r/20250529135324.182868-1-fb@ltec.ch
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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We have dedictaded bindings for scl/sda nowadays. Switch away from the
deprecated plain 'gpios' property.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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We can use string choices helper, let's use it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Replace verbatim license text with a `SPDX-License-Identifier`
The comment header mis-attributes this license to be "X11", but the
license text does not include the last line "Except as contained in this
notice, the name of the X Consortium shall not be used in advertising or
otherwise to promote the sale, use or other dealings in this Software
without prior written authorization from the X Consortium.". Therefore,
this license is actually equivalent to the SPDX "MIT" license (confirmed
by text diffing).
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Bence Csókás <csokas.bence@prolan.hu>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm into gpio/for-next
Runtime PM updates related to autosuspend for 6.17
Make several autosuspend functions mark last busy stamp and update
the documentation accordingly (Sakari Ailus).
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Immutable branch between GPIO, MFD and ARM-SoC for v6.17-rc1
Remove struct bgpio_pdata after converting its users to generic device
properties.
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The GPIO device in crag6410 is registered with struct bgpio_pdata passed
as platform_data to the gpio-mmio driver. We want to remove the
bgpio_pdata from the kernel and the gpio-mmio driver is now also able to
get the relevant values from the software node. Set up device properties
and switch to using platform_device_info to register the device as
platform_add_devices() doesn't allow us to pass device properties to the
driver model.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20250701-gpio-mmio-pdata-v2-5-ebf34d273497@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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The two latch GPIO devices in ams-delta are registered with struct
bgpio_pdata passed as platform_data to the gpio-mmio driver. We want to
remove the bgpio_pdata from the kernel and the gpio-mmio driver is now
also able to get the relevant values from the software node. Set up
device properties and switch to using platform_device_info to register
the devices as platform_add_devices() doesn't allow us to pass device
properties to the driver model.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Link: https://lore.kernel.org/r/20250701-gpio-mmio-pdata-v2-4-ebf34d273497@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the legacy generic
gpio-reg module to using them. We have to update the two legacy ARM
platforms that use it at the same time as they call the set_multiple()
callbacks directly (they shouldn't but it's old technical debt I
suppose).
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20250623-gpiochip-set-rv-gpio-v3-1-90f0e170a846@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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Describe the cache memories according with datasheet chapter 15.2:
- L1 cache configuration with 32KB for both data and instruction cache.
- L2 cache configuration with 256KB unified cache.
Before this patch the kernel reported the warning:
[ 0.171425] cacheinfo: Unable to detect cache hierarchy for CPU 0
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250619070636.8844-3-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Describe the cache memories according with datasheet chapter 15.2:
- L1 cache configuration with 32KB for both data and instruction cache.
- L2 cache configuration with 256KB unified cache.
Before this patch the kernel reported the warning:
[ 0.161955] cacheinfo: Unable to detect cache hierarchy for CPU 0
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250619070636.8844-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add the memory size properties for L1 and L2 according with block
diagram from datasheet:
- L1 cache configuration with 32 KB for both data and instruction cache.
- L2 cache configuration with 128 KB unified cache.
[root@sama5d4 ~]$ lscpu
Architecture: armv7l
Byte Order: Little Endian
CPU(s): 1
On-line CPU(s) list: 0
Vendor ID: ARM
Model name: Cortex-A5
Caches (sum of all):
L1d: 32 KiB (1 instance)
L1i: 32 KiB (1 instance)
L2: 128 KiB (1 instance)
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-4-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add the memory size properties for L1 according with block
diagram from datasheet:
- L1 cache configuration with 32 KB for both data and instruction cache.
[root@sama5d3 ~]$ lscpu
Architecture: armv7l
Byte Order: Little Endian
CPU(s): 1
On-line CPU(s) list: 0
Vendor ID: ARM
Model name: Cortex-A5
Caches (sum of all):
L1d: 32 KiB (1 instance)
L1i: 32 KiB (1 instance)
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-3-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add the memory size properties for L1 and L2 according with block
diagram from datasheet:
- L1 cache configuration with 32 KB for both data and instruction cache.
- L2 cache configuration with 128 KB unified cache.
[root@sama5d2 ~]$ lscpu
Architecture: armv7l
Byte Order: Little Endian
CPU(s): 1
On-line CPU(s) list: 0
Vendor ID: ARM
Model name: Cortex-A5
Caches (sum of all):
L1d: 32 KiB (1 instance)
L1i: 32 KiB (1 instance)
L2: 128 KiB (1 instance)
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same
level of feature than a STM32MP157C SOC but A7 clock frequency can reach
800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.
As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE
SCMI services for SoC clock and reset controllers resources, and for PMIC,
now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is
introduced, to move all clocks, resets and regulators to SCMI-based ones.
To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion
and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable
i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for
dual role with type-C support if needed.
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
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