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drivers
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clk
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renesas
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r9a07g043-cpg.c
Age
Commit message (
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Author
2025-06-10
clk: renesas: rzg2l: Add support for MSTOP in clock enable/disable API
Claudiu Beznea
2025-02-03
clk: renesas: r9a07g043: Fix HP clock source for RZ/Five
Lad Prabhakar
2024-07-30
clk: renesas: r9a07g043: Add LCDC clock and reset entries
Biju Das
2024-04-23
clk: renesas: r9a07g043: Add clock and reset entry for PLIC
Lad Prabhakar
2024-03-26
clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const
Paul Barker
2024-02-13
clk: renesas: r9a07g04[34]: Fix typo for sel_shdi variable
Claudiu Beznea
2024-02-13
clk: renesas: r9a07g04[34]: Use SEL_SDHI1_STS status configuration for SD1 mux
Claudiu Beznea
2024-01-31
clk: renesas: r9a07g043: Add clock and reset entries for CRU
Biju Das
2023-10-10
clk: renesas: rzg2l: Refactor SD mux driver
Claudiu Beznea
2023-10-05
clk: renesas: rzg2l: Remove CPG_SDHI_DSEL from generic header
Claudiu Beznea
2023-07-25
clk: renesas: r9a07g043: Add MTU3a clock and reset entry
Biju Das
2022-10-26
clk: renesas: r9a07g043: Drop WDT2 clock and reset entry
Lad Prabhakar
2022-07-05
clk: renesas: r9a07g043: Add support for RZ/Five SoC
Lad Prabhakar
2022-05-05
clk: renesas: rzg2l: Make use of CLK_MON registers optional
Phil Edworthy
2022-05-05
clk: renesas: rzg2l: Set HIWORD mask for all mux and dividers
Phil Edworthy
2022-05-05
clk: renesas: rzg2l: Add read only versions of the clk macros
Phil Edworthy
2022-05-05
clk: renesas: rzg2l: Move the DEF_MUX array size calc into the macro
Phil Edworthy
2022-05-05
clk: renesas: r9a07g043: Add clock and reset entries for ADC
Biju Das
2022-05-05
clk: renesas: r9a07g043: Add TSU clock and reset entry
Biju Das
2022-05-05
clk: renesas: r9a07g043: Add RSPI clock and reset entries
Biju Das
2022-05-05
clk: renesas: r9a07g043: Add clock and reset entries for SPI Multi I/O Bus Co...
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add WDT clock and reset entries
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add OSTM clock and reset entries
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add clock and reset entries for CANFD
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add USB clocks/resets
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add SSIF-2 clock and reset entries
Biju Das
2022-04-28
clk: renesas: r9a07g043: Add I2C clocks/resets
Biju Das
2022-04-13
clk: renesas: r9a07g043: Add SDHI clock and reset entries
Biju Das
2022-04-13
clk: renesas: r9a07g043: Add GbEthernet clock/reset
Biju Das
2022-04-13
clk: renesas: r9a07g043: Add ethernet clock sources
Biju Das
2022-04-13
clk: renesas: r9a07g043: Add GPIO clock and reset entries
Biju Das
2022-04-13
clk: renesas: Add support for RZ/G2UL SoC
Biju Das