Age | Commit message (Collapse) | Author |
|
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/20250410-gpiochip-set-rv-pinctrl-qcom-v1-3-6a6891338aae@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Replace ternary (condition ? "enable" : "disable") syntax with helpers
from string_choices.h because:
1. Simple function call with one argument is easier to read. Ternary
operator has three arguments and with wrapping might lead to quite
long code.
2. Is slightly shorter thus also easier to read.
3. It brings uniformity in the text - same string.
4. Allows deduping by the linker, which results in a smaller binary
file.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com>
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/20250114203602.1013275-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Commit 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength
mapping") fixed a long-standing issue in the Qualcomm SPMI PMIC gpio
driver which had the 'low' and 'high' drive strength settings switched
but failed to update the debugfs interface which still gets this wrong.
Fix the debugfs code so that the exported values match the hardware
settings.
Note that this probably means that most devicetrees that try to describe
the firmware settings got this wrong if the settings were derived from
debugfs. Before the above mentioned commit the settings would have
actually matched the firmware settings even if they were described
incorrectly, but now they are inverted.
Fixes: 723e8462a4fe ("pinctrl: qcom: spmi-gpio: Fix the GPIO strength mapping")
Fixes: eadff3024472 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver")
Cc: Anjelique Melendez <quic_amelende@quicinc.com>
Cc: stable@vger.kernel.org # 3.19
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/20241025121622.1496-1-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PM8937 has 8 GPIO-s with holes on GPIO3, GPIO4 and GPIO6.
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/20241031-msm8917-v2-2-8a075faa89b1@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The use of of_property_read_bool() for non-boolean properties is
deprecated in favor of of_property_present() when testing for property
presence.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20241104194437.327430-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/pinctrl to use .remove(),
with the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/20241007205803.444994-8-u.kleine-koenig@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Some new drivers is the main part, the rest is cleanups and nonurgent
fixes.
Nothing much special about this, no core changes this time.
New drivers:
- Renesas RZ/V2H(P) SoC
- NXP Freescale i.MX91 SoC
- Nuvoton MA35D1 SoC
- Qualcomm PMC8380, SM4250, SM4250 LPI
Enhancements:
- A slew of scoped-based simplifications of of_node_put()"
* tag 'pinctrl-v6.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (110 commits)
pinctrl: renesas: rzg2l: Support output enable on RZ/G2L
pinctrl: renesas: rzg2l: Clean up and refactor OEN read/write functions
pinctrl: renesas: rzg2l: Clarify OEN read/write support
dt-bindings: pinctrl: pinctrl-single: Fix pinctrl-single,gpio-range description
dt-bindings: pinctrl: npcm8xx: add missing pin group and mux function
dt-bindings: pinctrl: pinctrl-single: fix schmitt related properties
pinctrl: freescale: Use scope based of_node_put() cleanups
pinctrl: equilibrium: Use scope based of_node_put() cleanups
pinctrl: ti: iodelay: Use scope based of_node_put() cleanups
pinctrl: qcom: lpass-lpi: increase MAX_NR_GPIO to 32
pinctrl: cy8c95x0: Update cache modification
pinctrl: cy8c95x0: Use cleanup.h
pinctrl: renesas: r8a779h0: Remove unneeded separators
pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function
pinctrl: renesas: r8a779g0: Remove unneeded separators
pinctrl: renesas: r8a779h0: Add AVB MII pins and groups
pinctrl: renesas: r8a779g0: Fix TPU suffixes
pinctrl: renesas: r8a779g0: Fix TCLK suffixes
pinctrl: renesas: r8a779g0: FIX PWM suffixes
pinctrl: renesas: r8a779g0: Fix IRQ suffixes
...
|
|
PMC8380 is a new chip, featuring 10 GPIOs. Describe it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240525-topic-pmc8380_gpio-v2-2-2de50cb28ac1@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The SPMI GPIO driver assumes that the parent device is an SPMI device
and accesses random data when backcasting the parent struct device
pointer for non-SPMI devices.
Fortunately this does not seem to cause any issues currently when the
parent device is an I2C client like the PM8008, but this could change if
the structures are reorganised (e.g. using structure randomisation).
Notably the interrupt implementation is also broken for non-SPMI devices.
Also note that the two GPIO pins on PM8008 are used for interrupts and
reset so their practical use should be limited.
Drop the broken GPIO support for PM8008 for now.
Fixes: ea119e5a482a ("pinctrl: qcom-pmic-gpio: Add support for pm8008")
Cc: stable@vger.kernel.org # 5.13
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240529162958.18081-9-johan+linaro@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for qcom,pmih0108-gpio and qcom,pmd8028-gpio.
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-5-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for qcom,pmxr2230-gpio and qcom,pm6450-gpio.
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Message-ID: <20240326220628.2392802-4-quic_amelende@quicinc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is ignored (apart
from emitting a warning) and this typically results in resource leaks.
To improve here there is a quest to make the remove callback return
void. In the first step of this quest all drivers are converted to
.remove_new(), which already returns void. Eventually after all drivers
are converted, .remove_new() will be renamed to .remove().
Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20231009083856.222030-16-u.kleine-koenig@pengutronix.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
pmx75 pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
pm7550ba pmic support gpio controller so add compatible in the driver.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1688707209-30151-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the 8 GPIOs found on PM8953.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230421-pm8953-gpio-v1-2-3d33e2de47e3@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the 8 GPIOs found on PMI632.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230414-pmi632-v2-2-98bafa909c36@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the GPIO controller present on the pmm8654au PMIC.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230327125316.210812-14-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The device fwnode can be get via dev_fwnode() getter.
Use it where it makes sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230113220703.45686-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the pm8550, pm8550b, pm8550ve, pm8550vs, pmk8550 & pmr735d
gpio controllers providing GPIO control over SPMI.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-spmi-v2-3-b839bf2d558a@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
|
Add support for qcom,pm7250b-gpio variant.
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220912210624.4527-4-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The SPMI based PMICs have the HIGH and LOW GPIO output strength mappings
interchanged, fix them.
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Link: https://lore.kernel.org/r/20220912210624.4527-3-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for SPMI PMIC GPIO subtypes GPIO_LV_VIN2 and
GPIO_MV_VIN3.
GPIO_LV_VIN2 GPIOs support two input reference voltages: VIN0 and
VIN1. These are typically connected to 1.8 V and 1.2 V supplies
respectively.
GPIO_MV_VIN3 GPIOs support three input reference voltages: VIN0,
VIN1, and VIN2. These are typically connected to Vph, 1.8 V, and
1.2 V supplies respectively.
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
Link: https://lore.kernel.org/r/20220912210624.4527-2-quic_amelende@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The irqchip implementation used inside the gpiochips are not supposed to
be changed during runtime. So let's make the one inside the spmi-gpio
gpiochip immutable.
This fixes the below warning during boot:
gpio gpiochip0: (c440000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220830092232.168561-1-manivannan.sadhasivam@linaro.org
[switched two lines as indicated by Johan]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Outside the pinctrl driver and DT bindings we hit some Arm DT files,
patched by the maintainers.
Other than that it is business as usual.
Core changes:
- Add PINCTRL_PINGROUP() helper macro (and use it in the AMD driver).
New drivers:
- Intel Meteor Lake support.
- Reneasas RZ/V2M and r8a779g0 (R-Car V4H).
- AXP209 variants AXP221, AXP223 and AXP809.
- Qualcomm MSM8909, PM8226, PMP8074 and SM6375.
- Allwinner D1.
Improvements:
- Proper pin multiplexing in the AMD driver.
- Mediatek MT8192 can use generic drive strength and pin bias, then
fixes on top plus some I2C pin group fixes.
- Have the Allwinner Sunplus SP7021 use the generic DT schema and
make interrupts optional.
- Handle Qualcomm SC7280 ADSP.
- Handle Qualcomm MSM8916 CAMSS GP clock muxing.
- High impedance bias on ZynqMP.
- Serialize StarFive access to MMIO.
- Immutable gpiochip for BCM2835, Ingenic, Qualcomm SPMI GPIO"
* tag 'pinctrl-v6.0-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (117 commits)
dt-bindings: pinctrl: qcom,pmic-gpio: add PM8226 constraints
pinctrl: qcom: Make PINCTRL_SM8450 depend on PINCTRL_MSM
pinctrl: qcom: sm8250: Fix PDC map
pinctrl: amd: Fix an unused variable
dt-bindings: pinctrl: mt8186: Add and use drive-strength-microamp
dt-bindings: pinctrl: mt8186: Add gpio-line-names property
ARM: dts: imxrt1170-pinfunc: Add pinctrl binding header
pinctrl: amd: Use unicode for debugfs output
pinctrl: amd: Fix newline declaration in debugfs output
pinctrl: at91: Fix typo 'the the' in comment
dt-bindings: pinctrl: st,stm32: Correct 'resets' property name
pinctrl: mvebu: Missing a blank line after declarations.
pinctrl: qcom: Add SM6375 TLMM driver
dt-bindings: pinctrl: Add DT schema for SM6375 TLMM
dt-bindings: pinctrl: mt8195: Use drive-strength-microamp in examples
Revert "pinctrl: qcom: spmi-gpio: make the irqchip immutable"
pinctrl: imx93: Add MODULE_DEVICE_TABLE()
pinctrl: sunxi: Add driver for Allwinner D1
pinctrl: sunxi: Make some layout parameters dynamic
pinctrl: sunxi: Refactor register/offset calculation
...
|
|
This reverts commit 7542766e78fc374d81d8c2db214c4b4308645277.
It was noted during follow-up that the approach is incorrect.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PMP8074 has 12 GPIO-s with holes on GPIO1 and GPIO12.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20220711203408.2949888-4-robimarko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for pm8226 SPMI GPIOs. The PMIC features
8 GPIOs, with no holes inbetween.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Suggested-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com>
Link: https://lore.kernel.org/r/20211125215310.62371-1-dominikkobinski314@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The gpiolib is unique in the way it uses intermediate fwspecs
when feeding an interrupt specifier to the parent domain, as it
relies on the populate_parent_alloc_arg() callback to perform
a dynamic allocation.
This is pretty inefficient (we free the structure almost immediately),
and the only reason this isn't a stack allocation is that our
ThunderX friend uses MSIs rather than a FW-constructed structure.
Let's solve it by providing a new type composed of the union
of a struct irq_fwspec and a msi_info_t, which satisfies both
requirements. This allows us to use a stack allocation, and we
can move the handful of users to this new scheme.
Also perform some additional cleanup, such as getting rid of the
stub versions of the irq_domain_translate_*cell helpers, which
are never used when CONFIG_IRQ_DOMAIN_HIERARCHY isn't selected.
Tested on a Tegra186.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Daniel Palmer <daniel@thingy.jp>
Cc: Romain Perier <romain.perier@gmail.com>
Cc: Bartosz Golaszewski <brgl@bgdev.pl>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Robert Richter <rric@kernel.org>
Cc: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220707182314.66610-2-prabhakar.mahadev-lad.rj@bp.renesas.com
|
|
Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning to indicate if the gpiolib is altering the
internals of irqchips.
Following this change the following warning is now observed for the SPMI
PMIC pinctrl driver:
gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immutable chip, please consider fixing it!
Fix this by making the irqchip in the SPMI PMIC pinctrl driver immutable.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220624195112.894916-1-robimarko@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The pm6125 has 9 GPIOs with no holes inbetween.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220511220613.1015472-4-marijn.suijten@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PMX65 pmic support gpio controller so add compatible.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1649048650-14059-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PM8450 provides 4 GPIOs. Add a compatible entry for this GPIO block.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220315091106.613153-1-dmitry.baryshkov@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PM2250, commonly combined with QCM2290, provides ten SPMI GPIOs.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1637076915-3280-1-git-send-email-loic.poulain@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PM8019 provides 6 GPIOs. Add a compatible to support that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211112115342.17100-2-konrad.dybcio@somainline.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"The most interesting aspect is that we now have initial support for
the Apple pin controller as used in the M1 laptops and the iPhones
which is a step forward for using Linux efficiently on this Apple
silicon.
Core changes:
- Add infrastructure for per-parent interrupt data to support the
Apple pin controller.
New drivers:
- New combined pin control and GPIO driver for the Apple SoC. This is
used in all modern Apple silicon such as the M1 laptops but also in
at least recent iPhone variants.
- New subdriver for the Qualcomm SM6350
- New subdriver for the Qualcomm QCM2290
- New subdriver for the Qualcomm PM6350
- New subdriver for the Uniphier NX1
- New subdriver for the Samsung ExynosAutoV9
- New subdriver for the Mediatek MT7986
- New subdriver for the nVidia Tegra194
Improvements:
- Improve power management in the Mediatek driver.
- Improvements to the Renesas internal consistency checker.
- Convert the Rockchip pin control device tree bindings to YAML.
- Finally convert the Qualcomm PMIC SSBI and SPMI MPP GPIO driver to
use hierarchical interrupts.
- Convert the Qualcomm PMIC MPP device tree bindings to YAML"
* tag 'pinctrl-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (55 commits)
pinctrl: add pinctrl/GPIO driver for Apple SoCs
dt-bindings: pinctrl: Add apple,npins property to apple,pinctrl
dt-bindings: pinctrl: add #interrupt-cells to apple,pinctrl
gpio: Allow per-parent interrupt data
pinctrl: tegra: Fix warnings and error
pinctrl: intel: Kconfig: Add configuration menu to Intel pin control
pinctrl: tegra: Use correct offset for pin group
pinctrl: core: fix possible memory leak in pinctrl_enable()
pinctrl: bcm2835: Allow building driver as a module
pinctrl: equilibrium: Fix function addition in multiple groups
pinctrl: tegra: Add pinmux support for Tegra194
pinctrl: tegra: include lpdr pin properties
pinctrl: mediatek: add support for MT7986 SoC
dt-bindings: pinctrl: update bindings for MT7986 SoC
pinctrl: microchip sgpio: use reset driver
dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add reset binding
dt-bindings: pinctrl: qcom,pmic-mpp: switch to #interrupt-cells
pinctrl: qcom: spmi-mpp: add support for hierarchical IRQ chip
pinctrl: qcom: spmi-mpp: hardcode IRQ counts
pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip
...
|
|
Add support for the GPIO controller in the pm6350 PMIC.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20211007212444.328034-6-luca@z3ntu.xyz
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Currently, if the GPIO is configured as output in the bootloader
and user changes the mode to input in HLOS, it would end up
getting configured as input/output. Functionally, this is fine;
however, there may be some requirements where the output needs
to be disabled so that it can be used only for input.
Add support to enable/disable output mode through "output-enable"
or "output-disable" pinctrl properties.
Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1631588246-4811-3-git-send-email-quic_subbaram@quicinc.com
[Drop copyright change which is already upstrean in -rcN]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
pmic_gpio_child_to_parent_hwirq() and
gpiochip_populate_parent_fwspec_fourcell() translate a pinctrl-
spmi-gpio irqspec to an SPMI controller irqspec. When they do
this, they use a fixed SPMI slave ID of 0 and a fixed GPIO
peripheral offset of 0xC0 (corresponding to SPMI address 0xC000).
This translation results in an incorrect irqspec for secondary
PMICs that don't have a slave ID of 0 as well as for PMIC chips
which have GPIO peripherals located at a base address other than
0xC000.
Correct this issue by passing the slave ID of the pinctrl-spmi-
gpio device's parent in the SPMI controller irqspec and by
calculating the peripheral ID base from the device tree 'reg'
property of the pinctrl-spmi-gpio device.
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: satya priya <skakit@codeaurora.org>
Fixes: ca69e2d165eb ("qcom: spmi-gpio: add support for hierarchical IRQ chip")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1631798498-10864-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
The SC8180x platform comes with PMC8180 and PMC8180c, add support for
the GPIO controller in these PMICs.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210629003851.1787673-1-bjorn.andersson@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
SA8155p-adp PMIC (PMM8155AU) exposes 10 GPIOs.
Add support for the same in the pinctrl driver.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20210629123407.82561-5-bhupesh.sharma@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Arrange the compatibles inside qcom pinctrl-spmi gpio driver
alphabetically.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20210629123407.82561-4-bhupesh.sharma@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add compatible string for PM7325 pmic GPIO support to the
Qualcomm PMIC GPIO driver.
Signed-off-by: satya priya <skakit@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1620817988-18809-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the two GPIOs present on Qualcomm Technologies, Inc.
PM8008.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
Link: https://lore.kernel.org/r/129d241ee510e28536d35dbfeee75474e12d8d22.1617901945.git.gurus@codeaurora.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for the PM8350, PM8350B, PM8350C, PMK8350, PMR735A and
PMR735B GPIO support to the Qualcomm PMIC GPIO driver.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210308164845.3210393-2-vkoul@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
PM55 pmic support gpio controller so add compatible and comment for gpio
holes
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20201126092151.1082697-2-vkoul@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of the pin control changes for the v5.9 kernel
series:
Core changes:
- The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
macro" was put in an immutable branch and merged into the pinctrl
tree as well. We see these changes also here.
- Improved debug output for pins used as GPIO.
New drivers:
- Ocelot Sparx5 SoC driver.
- Intel Emmitsburg SoC subdriver.
- Intel Tiger Lake-H SoC subdriver.
- Qualcomm PM660 SoC subdriver.
- Renesas SH-PFC R8A774E1 subdriver.
Driver improvements:
- Linear improvement and cleanups of the Intel drivers for
Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
things.
- Renesas SH-PFC has added support for RPC pins, groups, and
functions to r8a77970 and r8a77980.
- The newere Freescale (now NXP) i.MX8 pin controllers have been
modularized. This is driven by the Google Android GKI initiative I
think.
- Open drain support for pins on the Qualcomm IPQ4019.
- The Ingenic driver can handle both edges IRQ detection.
- A big slew of documentation fixes all over the place.
- A few irqchip template conversions by yours truly.
* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
pinctrl: stmfx: Use irqchip template
pinctrl: amd: Use irqchip template
pinctrl: mediatek: fix build for tristate changes
pinctrl: samsung: Use bank name as irqchip name
pinctrl: core: print gpio in pins debugfs file
pinctrl: mediatek: add mt6779 eint support
pinctrl: mediatek: add pinctrl support for MT6779 SoC
pinctrl: mediatek: avoid virtual gpio trying to set reg
pinctrl: mediatek: update pinmux definitions for mt6779
pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
pinctrl: mcp23s08: Use irqchip template
pinctrl: sx150x: Use irqchip template
dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
pinctrl: intel: Add Intel Emmitsburg pin controller support
pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
Revert "gpio: omap: handle pin config bias flags"
pinctrl: single: Use fallthrough pseudo-keyword
pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
pinctrl: baytrail: Use fallthrough pseudo-keyword
...
|
|
Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1].
[1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Link: https://lore.kernel.org/r/20200716212213.GA17623@embeddedor
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Add support for pm660(l) SPMI GPIOs. The PMICs feature
13 and 12 GPIOs respectively, though with a lot of
holes inbetween.
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20200622192558.152828-2-konradybcio@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
|
Fix the following warnings caused by reusage of the same irq_chip
instance for all spmi-gpio gpio_irq_chip instances. Instead embed
irq_chip into pmic_gpio_state struct.
gpio gpiochip2: (c440000.qcom,spmi:pmic@2:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.
gpio gpiochip3: (c440000.qcom,spmi:pmic@4:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.
gpio gpiochip4: (c440000.qcom,spmi:pmic@a:gpio@c000): detected irqchip that is shared with multiple gpiochips: please fix the driver.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20200604002817.667160-1-dmitry.baryshkov@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|