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path: root/drivers/spi
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2022-02-24Tegra QUAD SPI ACPI & device supportMark Brown
Merge series from Krishna Yarlagadda <kyarlagadda@nvidia.com>: Add ACPI support for Tegra210 QUAD SPI driver and a new compatilbe.
2022-02-24spi: tegra210-quad: add new chips to compatibleKrishna Yarlagadda
Add support for Tegra234 and soc data to select capabilities. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220222175611.58051-4-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-24spi: tegra210-quad: use device_reset methodKrishna Yarlagadda
Use device_reset api to replace duplicate code in driver to call reset_control_get api with reset handle. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/20220222175611.58051-2-kyarlagadda@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-24spi: pxa2xx-pci: Balance reference count for PCI DMA deviceAndy Shevchenko
The pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put(). Fixes: 743485ea3bee ("spi: pxa2xx-pci: Do a specific setup in a separate function") Fixes: 25014521603f ("spi: pxa2xx-pci: Enable DMA for Intel Merrifield") Reported-by: Wang Qing <wangqing@vivo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220223191637.31147-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-24spi: pxa2xx-pci: Do not dereference fwnode in struct deviceAndy Shevchenko
In order to make the underneath API easier to change in the future, prevent users from dereferencing fwnode from struct device. Instead, use the specific dev_fwnode() API for that. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220223191948.31325-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-23spi: add missing pci_dev_put() before returnWang Qing
pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put() Signed-off-by: Wang Qing <wangqing@vivo.com> Link: https://lore.kernel.org/r/1644890407-65167-1-git-send-email-wangqing@vivo.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-22spi: gpio: Implement LSB First bitbang supportAndreas Färber
Add support for slave DT property spi-lsb-first, i.e., SPI_LSB_FIRST mode. Duplicate the inline helpers bitbang_txrx_be_cpha{0,1} as LE versions. Conditionally call them from all the spi-gpio txrx_word callbacks. Some alternatives to this implementation approach were discussed back then [0], but eventually it was considered reasonable. [0] https://lore.kernel.org/linux-arm-kernel/20191212033952.5967-8-afaerber@suse.de/ Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Tested-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/feac3377-4ad1-77d8-9a18-3588d80fb909@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-22spi: stm32: ignore Rx queue not empty in stm32f4 Tx only modeAhmad Fatoum
STM32F4_SPI_SR_RXNE and STM32F4_SPI_SR_OVR are distinct bits in the same status register. ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE is thus equal to ~STM32F4_SPI_SR_OVR. The original intention was likely for transmission-only transfers to ignore interrupts both for when the Rx queue has bytes (RXNE) as well as when these bytes haven't been read in time (OVR). Fix the typo by adding the missing parenthesis. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20220201115142.3999860-1-a.fatoum@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-21spi: Use of_device_get_match_data()Minghao Chi (CGEL ZTE)
Use of_device_get_match_data() to simplify the code. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi (CGEL ZTE) <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220221020233.1925154-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-18spi: use sysfs_emit() for printing statistics and add trailing newlineHeiner Kallweit
Use dedicated function sysfs_emit() that does some extra checking, e.g. to ensure that no more than PAGESIZE bytes are written. In addition add a trailing newline to the output, that makes it better readable from the console. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/56e1588d-d53b-73e9-fdc8-7fe30bf91f11@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-18spi: clean up some inconsistent indentingYang Li
Eliminate the follow smatch warning: drivers/spi/spi-sunplus-sp7021.c:379 sp7021_spi_slave_transfer_one() warn: inconsistent indenting Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20220217010024.111904-1-yang.lee@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: New support and problem adjustment of SPI rockchipMark Brown
Merge series from Jon Lin <jon.lin@rock-chips.com>: A collection of fixes and support for new features in the Rockchip driver. base-commit: 80808768e41324d2e23de89972b5406c1020e6e4
2022-02-17spi: rockchip: clear interrupt status in error handlerJon Lin
The interrupt status bit of the previous error data transmition will affect the next operation and cause continuous SPI transmission failure. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-7-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: rockchip: Suspend and resume the bus during NOIRQ_SYSTEM_SLEEP_PM opsshengfei Xu
the wakeup interrupt handler which is guaranteed not to run while @resume noirq() is being executed. the patch can help to avoid the wakeup source try to access spi when the spi is in suspend mode. Signed-off-by: shengfei Xu <xsf@rock-chips.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-6-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: rockchip: Preset cs-high and clk polarity in setup progressJon Lin
After power up, the cs and clock is in default status, and the cs-high and clock polarity dts property configuration will take no effect until the calling of rockchip_spi_config in the first transmission. So preset them to make sure a correct voltage before the first transmission coming. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-5-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: rockchip: Stop spi slave dma receiver when cs inactiveJon Lin
The spi which's version is higher than ver 2 will automatically enable this feature. If the length of master transmission is uncertain, the RK spi slave is better to automatically stop after cs inactive instead of waiting for xfer_completion forever. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-4-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: rockchip: terminate dma transmission when slave abortJon Lin
After slave abort, all DMA should be stopped, or it will affect the next transmission and maybe abort again. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-3-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-17spi: rockchip: Fix error in getting num-cs propertyJon Lin
Get num-cs u32 from dts of_node property rather than u16. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20220216014028.8123-2-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-16spi: pxa2xx: Add support for Intel Raptor Lake PCH-SJarkko Nikula
Add support for LPSS SPI on Intel Raptor Lake PCH-S. It has four controllers each having two chip selects. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20220216091317.1302254-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-16spi: amd: Fix building without ACPI enabledAndré Almeida
Commit 209043554915 ("spi: amd: Add support for version AMDI0062") removed the cast ACPI_PTR() for no good reason. This wrapper is important to make sure that the driver can be compiled with or without CONFIG_ACPI enabled, useful for compiling test. Give back the cast so compilation works again. Fixes: 209043554915 ("spi: amd: Add support for version AMDI0062") Signed-off-by: André Almeida <andrealmeid@collabora.com> Link: https://lore.kernel.org/r/20220216162719.116062-1-andrealmeid@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-16spi: intel-pci: Add support for Intel Ice Lake-N SPI serial flashAndy Shevchenko
Intel Ice Lake-N has the same SPI serial flash controller as Ice Lake-LP. Add Ice Lake-N PCI ID to the driver list of supported devices. The device can be found on MacBookPro16,2 [1]. [1]: https://linux-hardware.org/?probe=f1c5cf0c43 Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20220215135139.4328-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-15spi: amd: Add support for new controller versionMark Brown
Merge series from André Almeida <andrealmeid@collabora.com>: This series do some cleanup and add support for new controller version, AMDI0062.
2022-02-15mtd: spi-nor / spi / MFD: Convert intel-spi to SPI MEMMark Brown
Merge series from Mika Westerberg <mika.westerberg@linux.intel.com>: Based on discussion on the patch I sent some time ago here: http://lists.infradead.org/pipermail/linux-mtd/2021-June/086867.html it turns out that the preferred way to deal with the SPI flash controller drivers is through SPI MEM which is part of Linux SPI subsystem. This series does that for the intel-spi driver. This also renames the driver to follow the convention used in the SPI subsystem. The first patch improves the write protection handling to be slightly more safer. The following two patches do the conversion itself. Note the Intel SPI flash controller only allows commands such as read, write and so on and it internally uses whatever addressing etc. it figured from the SFDP on the flash device. base-commit: e783362eb54cd99b2cac8b3a9aeac942e6f6ac07
2022-02-14spi: Retire legacy GPIO handlingLinus Walleij
All drivers using GPIOs as chip select have been rewritten to use GPIO descriptors passing the ->use_gpio_descriptors flag. Retire the code and fields used by the legacy GPIO API. Do not drop the ->use_gpio_descriptors flag: it now only indicates that we want to use GPIOs in addition to native chip selects. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220210231954.807904-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-14spi: Fix warning for Clang build and simplify codeLi-hao Kuo
Clang build fails with spi-sunplus-sp7021.c:405:2: error: variable 'ret' is used uninitialized whenever switch default is taken default: simplify code Restore initializing ret. and add return error at default Fixes: 47e8fe57a66f ("spi: Modify irq request position and modify parameters") Reported-by: Tom Rix <trix@redhat.com> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Nathan Chancellor <nathan@kernel.org> Reported-by: Mark Brown <broonie@kernel.org> Signed-off-by: Li-hao Kuo <lhjeff911@gmail.com> Link: https://lore.kernel.org/r/7d91e6ce29f9a8df2c53a47b4b977664020e237a.1644805060.git.lhjeff911@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-14mtd: spi-nor: intel-spi: Convert to SPI MEMMika Westerberg
The preferred way to implement SPI-NOR controller drivers is through SPI subsubsystem utilizing the SPI MEM core functions. This converts the Intel SPI flash controller driver over the SPI MEM by moving the driver from SPI-NOR subsystem to SPI subsystem and in one go make it use the SPI MEM functions. The driver name will be changed from intel-spi to spi-intel to match the convention used in the SPI subsystem. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mauro Lima <mauro.lima@eclypsium.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220209122706.42439-3-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-14spi: amd: Add support for version AMDI0062André Almeida
Add support for the AMD SPI controller version AMDI0062. Do this in a modular way where's easy to add new versions. Signed-off-by: André Almeida <andrealmeid@collabora.com> Link: https://lore.kernel.org/r/20220211143155.75513-4-andrealmeid@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-14spi: amd: Remove needless rom_addr variableAndré Almeida
rom_addr is not used in the code, so we can just drop it from struct amd_spi. Signed-off-by: André Almeida <andrealmeid@collabora.com> Link: https://lore.kernel.org/r/20220211143155.75513-3-andrealmeid@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-14spi: amd: Use iopoll for busy waitingAndré Almeida
Instead of implementing a custom IO busy wait function, just use readl_poll_timeout(). Signed-off-by: André Almeida <andrealmeid@collabora.com> Link: https://lore.kernel.org/r/20220211143155.75513-2-andrealmeid@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-10spi: mxic: Add support for pipelined ECC operationsMiquel Raynal
Some SPI-NAND chips do not have a proper on-die ECC engine providing error correction/detection. This is particularly an issue on embedded devices with limited resources because all the computations must happen in software, unless an external hardware engine is provided. These external engines are new and can be of two categories: external or pipelined. Macronix is providing both, the former being already supported. The second, however, is very SoC implementation dependent and must be instantiated by the SPI host controller directly. An entire subsystem has been contributed to support these engines which makes the insertion into another subsystem such as SPI quite straightforward without the need for a lot of specific functions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220202144536.393792-1-miquel.raynal@bootlin.com
2022-02-10spi: mxic: Add support for direct mappingMiquel Raynal
Implement the ->dirmap_create() and ->dirmap_read/write() hooks to provide a fast path for read and write accesses. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Zhengxun Li <zhengxunli@mxic.com.tw> Reviewed-by: Zhengxun Li <zhengxunli@mxic.com.tw> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-13-miquel.raynal@bootlin.com
2022-02-10spi: mxic: Create a helper to ease the start of an operationMiquel Raynal
Create the mxic_spi_mem_prep_op_cfg() helper to provide the content to write to the register controlling the next IO command. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-12-miquel.raynal@bootlin.com
2022-02-10spi: mxic: Create a helper to configure the controller before an operationMiquel Raynal
Create the mxic_spi_set_hc_cfg() helper to configure the HC_CFG register. This helper will soon be used by the dirmap implementation and having this code factorized out earlier will clarify this addition. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-11-miquel.raynal@bootlin.com
2022-02-10spi: mxic: Fix the transmit pathMiquel Raynal
By working with external hardware ECC engines, we figured out that Under certain circumstances, it is needed for the SPI controller to check INT_TX_EMPTY and INT_RX_NOT_EMPTY in both receive and transmit path (not only in the receive path). The delay penalty being negligible, move this code in the common path. Fixes: b942d80b0a39 ("spi: Add MXIC controller driver") Cc: stable@vger.kernel.org Suggested-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Zhengxun Li <zhengxunli@mxic.com.tw> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-10-miquel.raynal@bootlin.com
2022-02-10spi: spi-mem: Add an ecc parameter to the spi_mem_op structureMiquel Raynal
Soon the SPI-NAND core will need a way to request a SPI controller to enable ECC support for a given operation. This is because of the pipelined integration of certain ECC engines, which are directly managed by the SPI controller itself. Introduce a spi_mem_op additional field for this purpose: ecc. So far this field is left unset and checked to be false by all the SPI controller drivers in their ->supports_op() hook, as they all call spi_mem_default_supports_op(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-7-miquel.raynal@bootlin.com
2022-02-10spi: spi-mem: Kill the spi_mem_dtr_supports_op() helperMiquel Raynal
Now that spi_mem_default_supports_op() has access to the static controller capabilities (relating to memory operations), and now that these capabilities have been filled by the relevant controllers, there is no need for a specific helper checking only DTR operations, so let's just kill spi_mem_dtr_supports_op() and simply use spi_mem_default_supports_op() instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-6-miquel.raynal@bootlin.com
2022-02-10spi: mxic: Provide a capability structureMiquel Raynal
This controller has DTR support, so advertize it with a capability now that the spi-controller structure contains this new field. This will later be used by the core to discriminate whether an operation is supported or not, in a more generic way than having different helpers. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-5-miquel.raynal@bootlin.com
2022-02-10spi: cadence-quadspi: Provide a capability structureMiquel Raynal
This controller has DTR support, so advertize it with a capability now that the spi-controller structure contains this new field. This will later be used by the core to discriminate whether an operation is supported or not, in a more generic way than having different helpers. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-4-miquel.raynal@bootlin.com
2022-02-10spi: spi-mem: Check the controller extra capabilitiesMiquel Raynal
Controllers can now provide a spi-mem capabilities structure. Let's make use of it in spi_mem_controller_default_supports_op(). As we want to check for DTR operations as well as normal operations in a single helper, let's pull the necessary checks from spi_mem_dtr_supports_op() for now. However, because no controller provide these extra capabilities, this change has no effect so far. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-3-miquel.raynal@bootlin.com
2022-02-09spi: make remove callback a void functionMark Brown
Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: this series goal is to change the spi remove callback's return value to void. After numerous patches nearly all drivers already return 0 unconditionally. The four first patches in this series convert the remaining three drivers to return 0, the final patch changes the remove prototype and converts all implementers. base-commit: 26291c54e111ff6ba87a164d85d4a4e134b7315c
2022-02-09spi: make remove callback a void functionUwe Kleine-König
The value returned by an spi driver's remove function is mostly ignored. (Only an error message is printed if the value is non-zero that the error is ignored.) So change the prototype of the remove function to return no value. This way driver authors are not tempted to assume that passing an error to the upper layer is a good idea. All drivers are adapted accordingly. There is no intended change of behaviour, all callbacks were prepared to return 0 before. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Jérôme Pouiller <jerome.pouiller@silabs.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Claudius Heine <ch@denx.de> Acked-by: Stefan Schmidt <stefan@datenfreihafen.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Marcus Folkesson <marcus.folkesson@gmail.com> Acked-by: Łukasz Stelmach <l.stelmach@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220123175201.34839-6-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: tegra210-quad: Fix missin IRQ check in tegra_qspi_probeMiaoqian Lin
This func misses checking for platform_get_irq()'s call and may passes the negative error codes to request_threaded_irq(), which takes unsigned IRQ #, causing it to fail with -EINVAL, overriding an original error code. Stop calling request_threaded_irq() with invalid IRQ #s. Fixes: 921fc1838fb0 ("spi: tegra210-quad: Add support for Tegra210 QSPI controller") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220128165956.27821-1-linmq006@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: tegra114: Add missing IRQ check in tegra_spi_probeMiaoqian Lin
This func misses checking for platform_get_irq()'s call and may passes the negative error codes to request_threaded_irq(), which takes unsigned IRQ #, causing it to fail with -EINVAL, overriding an original error code. Stop calling request_threaded_irq() with invalid IRQ #s. Fixes: f333a331adfa ("spi/tegra114: add spi driver") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220128165238.25615-1-linmq006@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: ath79: add mem_ops for fast-readLuiz Angelo Daros de Luca
Reading from memory is 3x faster than bit-bang read operation. Also, for tl-wr2543nd, the bit-bang read was sporadically returning random data, possibly a HW defect, while fast-read works as expected. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Link: https://lore.kernel.org/r/20220129040453.8476-1-luizluca@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: Modify irq request position and modify parametersLi-hao Kuo
- Change irq request position to the back. - Add temporary varilable and setting (as suggested by Mr. Andy Shevchenko) Fixes: f62ca4e2a863 ("spi: Add spi driver for Sunplus SP7021") Signed-off-by: Li-hao Kuo <lhjeff911@gmail.com> Link: https://lore.kernel.org/r/a94e3b123773fe303221d2bd2e4ce36ffa905a1c.1644198957.git.lhjeff911@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: spidev: prevent spidev->speed_hz from being zeroDan Carpenter
A zero value for spi->max_speed_hz or spidev->speed_hz does not make sense and trying to set that can lead to divide by zero crashes in a some of the drivers. drivers/spi/spi-s3c64xx.c:874 s3c64xx_spi_setup() error: potential divide by zero bug '/ spi->max_speed_hz'. drivers/spi/spi-fsl-dspi.c:613 hz_to_spi_baud() error: potential divide by zero bug '/ speed_hz'. drivers/spi/spi-xlp.c:146 xlp_spi_setup() error: potential divide by zero bug '/ (spi->max_speed_hz)'. drivers/spi/spi-orion.c:162 orion_spi_baudrate_set() error: potential divide by zero bug '/ speed'. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20220125065202.GA8807@kili Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-08spi: spi-zynq-qspi: Fix a NULL pointer dereference in zynq_qspi_exec_mem_op()Zhou Qingyang
In zynq_qspi_exec_mem_op(), kzalloc() is directly used in memset(), which could lead to a NULL pointer dereference on failure of kzalloc(). Fix this bug by adding a check of tmpbuf. This bug was found by a static analyzer. The analysis employs differential checking to identify inconsistent security operations (e.g., checks or kfrees) between two code paths and confirms that the inconsistent operations are not recovered in the current function or the callers, so they constitute bugs. Note that, as a bug found by static analysis, it can be a false positive or hard to trigger. Multiple researchers have cross-reviewed the bug. Builds with CONFIG_SPI_ZYNQ_QSPI=m show no new warnings, and our static analyzer no longer warns about this code. Fixes: 67dca5e580f1 ("spi: spi-mem: Add support for Zynq QSPI controller") Signed-off-by: Zhou Qingyang <zhou1615@umn.edu> Link: https://lore.kernel.org/r/20211130172253.203700-1-zhou1615@umn.edu Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-02spi: mpc512x-psc: Fix compile errorsLinus Walleij
My patch created compilation bugs in the MPC512x-PSC driver. Fix them up. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: linuxppc-dev@lists.ozlabs.org Reported-by: kernel test robot <lkp@intel.com> Fixes: 2818824ced4b (" spi: mpc512x-psc: Convert to use GPIO descriptors") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220201234535.569973-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-02spi: Replace acpi_bus_get_device()Rafael J. Wysocki
Replace acpi_bus_get_device() that is going to be dropped with acpi_fetch_acpi_dev(). No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/2231987.ElGaqSPkdT@kreacher Signed-off-by: Mark Brown <broonie@kernel.org>
2022-02-01Merge tag 'spi-fix-v5.17-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "There are quite a few fixes that have accumilated since the merge window here, all driver specific and none super urgent, plus a new device ID for the Rockchip driver" * tag 'spi-fix-v5.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: mediatek: Avoid NULL pointer crash in interrupt spi: dt-bindings: Fix 'reg' child node schema spi: bcm-qspi: check for valid cs before applying chip select spi: uniphier: fix reference count leak in uniphier_spi_probe() spi: meson-spicc: add IRQ check in meson_spicc_probe spi: uniphier: Fix a bug that doesn't point to private data correctly spi: change clk_disable_unprepare to clk_unprepare spi: spi-rockchip: Add rk3568-spi compatible spi: stm32: make SPI_MASTER_MUST_TX flags only specific to STM32F4 spi: stm32: remove inexistant variables in struct stm32_spi_cfg comment spi: stm32-qspi: Update spi registering
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