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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/samsung,exynos4210-srom-peripheral-props.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Peripheral Properties for Samsung Exynos SoC SROM Controller
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
properties:
samsung,srom-page-mode:
description:
If page mode is set, 4 data page mode will be configured,
else normal (1 data) page mode will be set.
type: boolean
samsung,srom-timing:
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 6
maxItems: 6
description: |
Array of 6 integers, specifying bank timings in the following order:
Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
Each value is specified in cycles and has the following meaning
and valid range:
Tacp: Page mode access cycle at Page mode (0 - 15)
Tcah: Address holding time after CSn (0 - 15)
Tcoh: Chip selection hold on OEn (0 - 15)
Tacc: Access cycle (0 - 31, the actual time is N + 1)
Tcos: Chip selection set-up before OEn (0 - 15)
Tacs: Address set-up before CSn (0 - 15)
additionalProperties: true
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