Documentation/devicetree/bindings/soc/fsl/fsl,imx23-digctl.yaml


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/fsl/fsl,imx23-digctl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Freescale mxs digctrl for i.MX23/i.MX28

description: |
  The digital control block provides overall control of various items within
  the top digital block of the chip, including:
    - Default first-level page table (DFLPT) controls
    - HCLK performance counter
    - Free-running microseconds counter
    - Entropy control
    - BIST controls for ARM Core and On-Chip RAM
    - Chip Revision register
    - USB loop back congtrol
    - Other miscellaneous controls

maintainers:
  - Frank Li <Frank.Li@nxp.com>

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - fsl,imx28-digctl
          - const: fsl,imx23-digctl
      - const: fsl,imx23-digctl

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

required:
  - compatible
  - reg
  - interrupts

additionalProperties: false

examples:
  - |
    digctl@8001c000 {
        compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
        reg = <0x8001c000 0x2000>;
        interrupts = <89>;
    };