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authorRussell King <rmk+kernel@arm.linux.org.uk>2016-11-29 10:13:48 +0000
committerRussell King <rmk+kernel@armlinux.org.uk>2020-10-23 10:13:42 +0100
commitdcbe4095c953bbb002f054df92c0dce6ba7e9aee (patch)
treedff2c4d050ffb8d5471bcb6a8c9df30f7036d998
parentbd6728d5951b7ddb55cbfdaa5e443d92f2989679 (diff)
implement slot capabilities (SSPL)clearfog
-rw-r--r--drivers/pci/controller/pci-mvebu.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index b4fb20835573..060226d11588 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -67,6 +67,12 @@
#define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -517,6 +523,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
+ break;
+ }
+
case PCI_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
break;
@@ -645,6 +659,15 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCI_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((new & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((new & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCI_EXP_RTSTA:
mvebu_writel(port, new, PCIE_RC_RTSTA);
break;