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authorRussell King <rmk+kernel@arm.linux.org.uk>2016-11-29 10:13:48 +0000
committerRussell King <rmk+kernel@armlinux.org.uk>2017-07-07 16:12:30 +0100
commit589cfbf1ea65de5be3a99eb6e22884a43236f87f (patch)
treea37339d916284c711cc49d45ab9a357300a64190
parent721032736bd1e4b3ac6a139d96f69dc4f74e60e8 (diff)
implement slot capabilities (SSPL)clearfog-4.12
-rw-r--r--drivers/pci/host/pci-mvebu.c22
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index f73aa5a89f10..d6394a5113a5 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -67,6 +67,12 @@
#define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000
#define PCIE_STAT_LINK_DOWN BIT(0)
+#define PCIE_SSPL 0x1a0c
+#define PCIE_SSPL_MSGEN BIT(14)
+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
#define PCIE_RC_RTSTA 0x1a14
#define PCIE_DEBUG_CTRL 0x1a60
#define PCIE_DEBUG_SOFT_RESET BIT(20)
@@ -121,7 +127,6 @@ struct mvebu_sw_pci_bridge {
u16 bridgectrl;
/* PCI express capability */
- u32 pcie_sltcap;
u16 pcie_devctl;
u16 pcie_rtctl;
};
@@ -661,8 +666,12 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port,
break;
case PCISWCAP_EXP_SLTCAP:
- *value = bridge->pcie_sltcap;
+ {
+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
break;
+ }
case PCISWCAP_EXP_SLTCTL:
*value = PCI_EXP_SLTSTA_PDS << 16;
@@ -846,6 +855,15 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port,
mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;
+ case PCISWCAP_EXP_SLTCAP:
+ {
+ u32 sspl = PCIE_SSPL_SPLV((value & PCI_EXP_SLTCAP_SPLV) >> 7) |
+ PCIE_SSPL_SPLS((value & PCI_EXP_SLTCAP_SPLS) >> 15) |
+ PCIE_SSPL_MSGEN;
+ mvebu_writel(port, sspl, PCIE_SSPL);
+ break;
+ }
+
case PCISWCAP_EXP_RTCTL:
old = bridge->pcie_rtctl;
bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE |