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authorThomas Gleixner <tglx@linutronix.de>2020-12-10 20:25:57 +0100
committerThomas Gleixner <tglx@linutronix.de>2020-12-15 16:19:33 +0100
commit197d237077295793a3e4ea0abcbea106f8b4217c (patch)
tree1f12dab81f0205a8279cf051bbde11cd188e43d2
parent80a62deedf9d449cb65655df39d34b7ef9321d79 (diff)
net/mlx4: Use effective interrupt affinity
Using the interrupt affinity mask for checking locality is not really working well on architectures which support effective affinity masks. The affinity mask is either the system wide default or set by user space, but the architecture can or even must reduce the mask to the effective set, which means that checking the affinity mask itself does not really tell about the actual target CPUs. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Tariq Toukan <tariqt@nvidia.com> Link: https://lore.kernel.org/r/20201210194044.672935978@linutronix.de
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/en_cq.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_cq.c b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
index 2a250f32d5cb..d5fc72b1a36f 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_cq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_cq.c
@@ -117,7 +117,7 @@ int mlx4_en_activate_cq(struct mlx4_en_priv *priv, struct mlx4_en_cq *cq,
assigned_eq = true;
}
irq = mlx4_eq_get_irq(mdev->dev, cq->vector);
- cq->aff_mask = irq_get_affinity_mask(irq);
+ cq->aff_mask = irq_get_effective_affinity_mask(irq);
} else {
/* For TX we use the same irq per
ring we assigned for the RX */