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authorXiangliang Yu <yuxiangl@marvell.com>2011-09-29 00:34:55 -0700
committerJames Bottomley <JBottomley@Parallels.com>2011-10-02 13:17:27 -0500
commit3a4b7efe7fa8ce3822f6139cddce4bae24c9ffe6 (patch)
treebfeb050365c5bcd7a40435e3a7b047c5fb6a7a1b
parentaa117dd14372e1b0bed651af2db1be670b595032 (diff)
[SCSI] mvsas: expander write performance enhancement
with 1 expander, connect 8 HDD, the write performance will be improved by 80%. Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
-rw-r--r--drivers/scsi/mvsas/mv_94xx.c9
-rw-r--r--drivers/scsi/mvsas/mv_defs.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/scsi/mvsas/mv_94xx.c b/drivers/scsi/mvsas/mv_94xx.c
index 016d3d41f23a..130d8036a2b5 100644
--- a/drivers/scsi/mvsas/mv_94xx.c
+++ b/drivers/scsi/mvsas/mv_94xx.c
@@ -510,6 +510,15 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
tmp |= CINT_PHY_MASK;
mw32(MVS_INT_MASK, tmp);
+ /* tune STP performance */
+ tmp = 0x003F003F;
+ mvs_cw32(mvi, CMD_PL_TIMER, tmp);
+
+ /* This can improve expander large block size seq write performance */
+ tmp = mvs_cr32(mvi, CMD_PORT_LAYER_TIMER1);
+ tmp |= 0xFFFF007F;
+ mvs_cw32(mvi, CMD_PORT_LAYER_TIMER1, tmp);
+
/* change the connection open-close behavior (bit 9)
* set bit8 to 1 for performance tuning */
tmp = mvs_cr32(mvi, CMD_SL_MODE0);
diff --git a/drivers/scsi/mvsas/mv_defs.h b/drivers/scsi/mvsas/mv_defs.h
index dec7cadb7485..8e21482367d2 100644
--- a/drivers/scsi/mvsas/mv_defs.h
+++ b/drivers/scsi/mvsas/mv_defs.h
@@ -387,6 +387,7 @@ enum sas_cmd_port_registers {
CMD_SL_MODE0 = 0x1BC, /* SL Mode 0 */
CMD_SL_MODE1 = 0x1C0, /* SL Mode 1 */
CMD_PND_FIFO_CTL1 = 0x1C4, /* Pending FIFO Control 1 */
+ CMD_PORT_LAYER_TIMER1 = 0x1E0, /* Port Layer Timer 1 */
};
enum mvs_info_flags {