diff options
| author | Oswald Buddenhagen <oswald.buddenhagen@gmx.de> | 2023-05-10 19:39:06 +0200 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2023-05-12 09:16:54 +0200 |
| commit | 4102ac29759586e86cf129d66fc5ad5406a431a8 (patch) | |
| tree | 8eb8295ff0498d599e883c18ed85b9539c807dbf | |
| parent | 8cabf83c7aa54530e699be56249fb44f9505c4f3 (diff) | |
ALSA: emu10k1: fix+optimize E-MU stereo capture DSP code
Presumably, JDC added the seemingly superfluous indirection over the
temporary register because without it he'd get only zero readings.
However, switching the X and Y operands (or using EMU32 as the A
operand in the temporary load) works just fine. Presumably a DSP bug?
The original code was also actually buggy, though: both channels used
the left volume control.
Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
Link: https://lore.kernel.org/r/20230510173917.3073107-4-oswald.buddenhagen@gmx.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
| -rw-r--r-- | sound/pci/emu10k1/emufx.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/sound/pci/emu10k1/emufx.c b/sound/pci/emu10k1/emufx.c index eb40159a2eeb..795b2573fef4 100644 --- a/sound/pci/emu10k1/emufx.c +++ b/sound/pci/emu10k1/emufx.c @@ -1324,11 +1324,9 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) /* EMU1010 DSP 0 and DSP 1 Capture */ // The 24 MSB hold the actual value. We implicitly discard the 16 LSB. if (emu->card_capabilities->ca0108_chip) { - /* Note:JCD:No longer bit shift lower 16bits to upper 16bits of 32bit value. */ - A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x0), A_C_00000001); - A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_GPR(tmp)); - A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x1), A_C_00000001); - A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr), A_GPR(tmp)); + // For unclear reasons, the EMU32IN cannot be the Y operand! + A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A3_EMU32IN(0x0), A_GPR(gpr)); + A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A3_EMU32IN(0x1), A_GPR(gpr+1)); } else { A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_P16VIN(0x0)); A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_P16VIN(0x1)); |