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authorChris Packham <chris.packham@alliedtelesis.co.nz>2021-07-02 15:27:24 +1200
committerWolfram Sang <wsa@kernel.org>2021-07-02 09:12:51 +0200
commit763778cd79267dadf0ec7e044caf7563df0ab597 (patch)
treeb83fb6fe5865a4363536d124915e2850ab16eba4
parent87cf5127968ab3c543ebd98253052b928f9b47da (diff)
i2c: mpc: Restore reread of I2C status register
Prior to commit 1538d82f4647 ("i2c: mpc: Interrupt driven transfer") the old interrupt handler would reread MPC_I2C_SR after checking the CSR_MIF bit. When the driver was re-written this was removed as it seemed unnecessary. However as it turns out this is necessary for i2c devices which do clock stretching otherwise we end up thinking the bus is still busy when processing the interrupt. Fixes: 1538d82f4647 ("i2c: mpc: Interrupt driven transfer") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Wolfram Sang <wsa@kernel.org>
-rw-r--r--drivers/i2c/busses/i2c-mpc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 30d9e89a3db2..2ee4a9361e40 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -564,6 +564,8 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
status = readb(i2c->base + MPC_I2C_SR);
if (status & CSR_MIF) {
+ /* Read again to allow register to stabilise */
+ status = readb(i2c->base + MPC_I2C_SR);
writeb(0, i2c->base + MPC_I2C_SR);
mpc_i2c_do_intr(i2c, status);
return IRQ_HANDLED;