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authorAlex Deucher <alexander.deucher@amd.com>2016-05-05 11:17:22 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-11 12:31:25 -0400
commita71dd897599c94d38eb1c4d6c8d9f8e3275e82ce (patch)
tree2f09ddbfeff976ea40d46f041ea82f086e7f8df1
parent438498a862723b36369858611321478d8b444ee9 (diff)
drm/amdgpu/dce11: don't share PLLs on Polaris
They are part of the phy so you can't share them. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/dce_v11_0.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index dda9ffb68df8..e7b951f00421 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2419,10 +2419,6 @@ static u32 dce_v11_0_pick_pll(struct drm_crtc *crtc)
if (ENCODER_MODE_IS_DP(amdgpu_atombios_encoder_get_encoder_mode(amdgpu_crtc->encoder)))
return ATOM_DP_DTO;
- /* use the same PPLL for all monitors with the same clock */
- pll = amdgpu_pll_get_shared_nondp_ppll(crtc);
- if (pll != ATOM_PPLL_INVALID)
- return pll;
switch (amdgpu_encoder->encoder_id) {
case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: