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authorWill Deacon <will@kernel.org>2020-04-23 10:36:58 +0100
committerWill Deacon <will@kernel.org>2020-04-28 14:24:10 +0100
commite24e03aa00f0248a716ec7859c03f0034bb42fb2 (patch)
tree455fdeb82a08e3042bf70e5f9b243a4330e2f7f7
parent6a8b55ed4056ea5559ebe4f6a4b247f627870d4c (diff)
arm64: docs: Mandate that the I-cache doesn't hold stale kernel text
Although we require that the loaded kernel Image has been cleaned to the PoC, we neglect to spell out the state of the I-cache. Although this should be reasonably obvious, it doesn't hurt to be explicit. Require that the I-cache doesn't hold any stale entries for the kernel Image at boot. Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20200423093658.10602-1-will@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
-rw-r--r--Documentation/arm64/booting.rst3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
index a3f1a47b6f1c..d063c05d5fb0 100644
--- a/Documentation/arm64/booting.rst
+++ b/Documentation/arm64/booting.rst
@@ -173,7 +173,8 @@ Before jumping into the kernel, the following conditions must be met:
- Caches, MMUs
The MMU must be off.
- Instruction cache may be on or off.
+ The instruction cache may be on or off, and must not hold any stale
+ entries corresponding to the loaded kernel image.
The address range corresponding to the loaded kernel image must be
cleaned to the PoC. In the presence of a system cache or other
coherent masters with caches enabled, this will typically require