summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2019-04-28 12:15:24 -0700
committerOlof Johansson <olof@lixom.net>2019-04-28 12:15:24 -0700
commitf6f9683c5aedff214433fa130e67a79f08a47fdb (patch)
tree4582810672ee3e135d997f4d640a43d64b303fd4
parent1c93235a6d92deaab38bbb1cfc764b0757331ebb (diff)
parent4b028ebd4e3d86c61161b3a937b746043006dcbe (diff)
Merge tag 'v5.2-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
Quite a bit of love for the rk3288-veyron chromeos devices and a number of cleanups for rk3288 from that area, hdmi support for the old rk3066 a small rv1108-eglin-r1 cleanup and wifi+hdmi-cec for the tinker board. * tag 'v5.2-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: enable vop0 and hdmi nodes to rk3066a-mk808 ARM: dts: rockchip: add rk3066 hdmi nodes ARM: dts: rockchip: Add device tree for rk3288-veyron-mighty dt-bindings: ARM: dts: rockchip: Add bindings for rk3288-veyron-mighty ARM: dts: rockchip: Add vdd_logic to rk3288-veyron ARM: dts: rockchip: Add dvs-gpios to rk3288-veyron-jerry ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15 dt-bindings: ARM: dts: rockchip: Add rk3288-veyron-jerry rev 10-15 ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288 ARM: dts: rockchip: Enable WiFi on rk3288-tinker ARM: dts: rockchip: add grf reference in rk3288 tsadc node ARM: dts: rockchip: Enable HDMI CEC on rk3288-tinker-s ARM: dts: rockchip: remove disable-wp from rv1108-elgin-r1 emmc node Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.yaml19
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/rk3066a-mk808.dts29
-rw-r--r--arch/arm/boot/dts/rk3066a.dtsi59
-rw-r--r--arch/arm/boot/dts/rk3288-tinker-s.dts5
-rw-r--r--arch/arm/boot/dts/rk3288-tinker.dtsi37
-rw-r--r--arch/arm/boot/dts/rk3288-veyron-jerry.dts9
-rw-r--r--arch/arm/boot/dts/rk3288-veyron-mighty.dts34
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi17
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi27
-rw-r--r--arch/arm/boot/dts/rv1108-elgin-r1.dts1
11 files changed, 221 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index 061a03edf9c8..66d2f69e400d 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -146,7 +146,7 @@ properties:
- const: google,gru
- const: rockchip,rk3399
- - description: Google Jaq (Haier Chromebook 11 and more)
+ - description: Google Jaq (Haier Chromebook 11 and more w/ uSD)
items:
- const: google,veyron-jaq-rev5
- const: google,veyron-jaq-rev4
@@ -159,6 +159,12 @@ properties:
- description: Google Jerry (Hisense Chromebook C11 and more)
items:
+ - const: google,veyron-jerry-rev15
+ - const: google,veyron-jerry-rev14
+ - const: google,veyron-jerry-rev13
+ - const: google,veyron-jerry-rev12
+ - const: google,veyron-jerry-rev11
+ - const: google,veyron-jerry-rev10
- const: google,veyron-jerry-rev7
- const: google,veyron-jerry-rev6
- const: google,veyron-jerry-rev5
@@ -199,6 +205,17 @@ properties:
- const: google,veyron
- const: rockchip,rk3288
+ - description: Google Mighty (Haier Chromebook 11 and more w/ SD)
+ items:
+ - const: google,veyron-mighty-rev5
+ - const: google,veyron-mighty-rev4
+ - const: google,veyron-mighty-rev3
+ - const: google,veyron-mighty-rev2
+ - const: google,veyron-mighty-rev1
+ - const: google,veyron-mighty
+ - const: google,veyron
+ - const: rockchip,rk3288
+
- description: Google Minnie (Asus Chromebook Flip C100P)
items:
- const: google,veyron-minnie-rev4
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f4f5aeaf3298..48282ebfb3da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -909,6 +909,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-jaq.dtb \
rk3288-veyron-jerry.dtb \
rk3288-veyron-mickey.dtb \
+ rk3288-veyron-mighty.dtb \
rk3288-veyron-minnie.dtb \
rk3288-veyron-pinky.dtb \
rk3288-veyron-speedy.dtb \
diff --git a/arch/arm/boot/dts/rk3066a-mk808.dts b/arch/arm/boot/dts/rk3066a-mk808.dts
index 9d2216d71f70..8bc259d3e450 100644
--- a/arch/arm/boot/dts/rk3066a-mk808.dts
+++ b/arch/arm/boot/dts/rk3066a-mk808.dts
@@ -30,6 +30,17 @@
};
};
+ hdmi_con {
+ compatible = "hdmi-connector";
+ type = "c";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
vcc_io: vcc-io {
compatible = "regulator-fixed";
regulator-name = "vcc_io";
@@ -91,6 +102,20 @@
};
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_in_vop1 {
+ status = "disabled";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&mmc0 {
bus-width = <4>;
cap-mmc-highspeed;
@@ -150,6 +175,10 @@
status = "okay";
};
+&vop0 {
+ status = "okay";
+};
+
&wdt {
status = "okay";
};
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 653127a377fa..d9504fd456a7 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -80,6 +80,11 @@
vop0_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vop0_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vop0>;
+ };
};
};
@@ -101,6 +106,49 @@
vop1_out: port {
#address-cells = <1>;
#size-cells = <0>;
+
+ vop1_out_hdmi: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_in_vop1>;
+ };
+ };
+ };
+
+ hdmi: hdmi@10116000 {
+ compatible = "rockchip,rk3066-hdmi";
+ reg = <0x10116000 0x2000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HDMI>;
+ clock-names = "hclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
+ power-domains = <&power RK3066_PD_VIO>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in: port@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_in_vop0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vop0_out_hdmi>;
+ };
+
+ hdmi_in_vop1: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vop1_out_hdmi>;
+ };
+ };
+
+ hdmi_out: port@1 {
+ reg = <1>;
+ };
};
};
@@ -380,6 +428,17 @@
*/
};
+ hdmi {
+ hdmi_hpd: hdmi-hpd {
+ rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
+ };
+
+ hdmii2c_xfer: hdmii2c-xfer {
+ rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
+ <0 RK_PA2 1 &pcfg_pull_none>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,
diff --git a/arch/arm/boot/dts/rk3288-tinker-s.dts b/arch/arm/boot/dts/rk3288-tinker-s.dts
index d97da89bcd51..970e13859198 100644
--- a/arch/arm/boot/dts/rk3288-tinker-s.dts
+++ b/arch/arm/boot/dts/rk3288-tinker-s.dts
@@ -23,3 +23,8 @@
mmc-ddr-1_8v;
status = "okay";
};
+
+&hdmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_cec_c0>;
+};
diff --git a/arch/arm/boot/dts/rk3288-tinker.dtsi b/arch/arm/boot/dts/rk3288-tinker.dtsi
index aa107ee41b8b..b053589f8ff8 100644
--- a/arch/arm/boot/dts/rk3288-tinker.dtsi
+++ b/arch/arm/boot/dts/rk3288-tinker.dtsi
@@ -5,6 +5,7 @@
#include "rk3288.dtsi"
#include <dt-bindings/input/input.h>
+#include <dt-bindings/clock/rockchip,rk808.h>
/ {
chosen {
@@ -61,6 +62,16 @@
};
};
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rk808 RK808_CLKOUT1>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable>;
+ reset-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_LOW>,
+ <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
+ };
+
sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
@@ -337,6 +348,7 @@
status = "okay";
sdcard-supply = <&vccio_sd>;
+ wifi-supply = <&vcc_18>;
};
&pinctrl {
@@ -415,6 +427,13 @@
rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ sdio {
+ wifi_enable: wifi-enable {
+ rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
+ <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm0 {
@@ -439,6 +458,24 @@
vqmmc-supply = <&vccio_sd>;
};
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ max-frequency = <50000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ vmmc-supply = <&vcc_io>;
+ vqmmc-supply = <&vcc_18>;
+ status = "okay";
+};
+
&tsadc {
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index 2ba89895c33a..3e8f700a0d64 100644
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -11,7 +11,10 @@
/ {
model = "Google Jerry";
- compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
+ compatible = "google,veyron-jerry-rev15", "google,veyron-jerry-rev14",
+ "google,veyron-jerry-rev13", "google,veyron-jerry-rev12",
+ "google,veyron-jerry-rev11", "google,veyron-jerry-rev10",
+ "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
"google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
"google,veyron-jerry-rev3", "google,veyron-jerry",
"google,veyron", "rockchip,rk3288";
@@ -61,7 +64,9 @@
&rk808 {
pinctrl-names = "default";
- pinctrl-0 = <&pmic_int_l>;
+ pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
+ dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>,
+ <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>;
regulators {
mic_vcc: LDO_REG2 {
diff --git a/arch/arm/boot/dts/rk3288-veyron-mighty.dts b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
new file mode 100644
index 000000000000..f640857cbdae
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-veyron-mighty.dts
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Veyron Mighty Rev 1+ board device tree source
+ *
+ * Copyright 2015 Google, Inc
+ */
+
+/dts-v1/;
+
+#include "rk3288-veyron-jaq.dts"
+
+/ {
+ model = "Google Mighty";
+ compatible = "google,veyron-mighty-rev5", "google,veyron-mighty-rev4",
+ "google,veyron-mighty-rev3", "google,veyron-mighty-rev2",
+ "google,veyron-mighty-rev1", "google,veyron-mighty",
+ "google,veyron", "rockchip,rk3288";
+};
+
+&sdmmc {
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
+ &sdmmc_wp_gpio &sdmmc_bus4>;
+ wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
+
+ /delete-property/ disable-wp;
+};
+
+&pinctrl {
+ sdmmc {
+ sdmmc_wp_gpio: sdmmc-wp-gpio {
+ rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 0bc2409f6903..5181d9435fda 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -95,6 +95,23 @@
regulator-boot-on;
vin-supply = <&vcc_5v>;
};
+
+ vdd_logic: vdd-logic {
+ compatible = "pwm-regulator";
+ regulator-name = "vdd_logic";
+
+ pwms = <&pwm1 0 1994 0>;
+ pwm-supply = <&vcc33_sys>;
+
+ pwm-dutycycle-range = <0x7b 0>;
+ pwm-dutycycle-unit = <0x94>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <950000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-ramp-delay = <4000>;
+ };
};
&cpu0 {
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index ca7d52daa8fb..743a7d85daf7 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -569,6 +569,7 @@
pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_gpio>;
#thermal-sensor-cells = <1>;
+ rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <95000>;
status = "disabled";
};
@@ -1378,19 +1379,6 @@
reg = <0x0 0xffaf0080 0x0 0x20>;
};
- gic: interrupt-controller@ffc01000 {
- compatible = "arm,gic-400";
- interrupt-controller;
- #interrupt-cells = <3>;
- #address-cells = <0>;
-
- reg = <0x0 0xffc01000 0x0 0x1000>,
- <0x0 0xffc02000 0x0 0x2000>,
- <0x0 0xffc04000 0x0 0x2000>,
- <0x0 0xffc06000 0x0 0x2000>;
- interrupts = <GIC_PPI 9 0xf04>;
- };
-
efuse: efuse@ffb40000 {
compatible = "rockchip,rk3288-efuse";
reg = <0x0 0xffb40000 0x0 0x20>;
@@ -1404,6 +1392,19 @@
};
};
+ gic: interrupt-controller@ffc01000 {
+ compatible = "arm,gic-400";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+
+ reg = <0x0 0xffc01000 0x0 0x1000>,
+ <0x0 0xffc02000 0x0 0x2000>,
+ <0x0 0xffc04000 0x0 0x2000>,
+ <0x0 0xffc06000 0x0 0x2000>;
+ interrupts = <GIC_PPI 9 0xf04>;
+ };
+
pinctrl: pinctrl {
compatible = "rockchip,rk3288-pinctrl";
rockchip,grf = <&grf>;
diff --git a/arch/arm/boot/dts/rv1108-elgin-r1.dts b/arch/arm/boot/dts/rv1108-elgin-r1.dts
index 1c4507b66fdd..b1db924710c8 100644
--- a/arch/arm/boot/dts/rv1108-elgin-r1.dts
+++ b/arch/arm/boot/dts/rv1108-elgin-r1.dts
@@ -37,7 +37,6 @@
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
- disable-wp;
no-sd;
no-sdio;
non-removable;