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authorSwapnil Jakhade <sjakhade@cadence.com>2024-01-04 14:30:09 +0100
committerVinod Koul <vkoul@kernel.org>2024-02-07 15:02:13 +0100
commit088de1293c84d0c08f0f4c30d2dd7cb14888aa6c (patch)
treeef75aa6e14204e5d099218f0368db420ed291bff
parent2668cae8b64bf25c4c7a39eb2cb0012c92153c11 (diff)
dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1
Add a new optional input reference clock (pll1_refclk) for PLL1. Update bindings to support dual reference clock multilink configurations. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20240104133013.2911035-2-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml10
1 files changed, 7 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
index dfb31314face..3893800f81b4 100644
--- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
@@ -35,14 +35,18 @@ properties:
minItems: 1
maxItems: 2
description:
- PHY reference clock for 1 item. Must contain an entry in clock-names.
- Optional Parent to enable output reference clock.
+ PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
+ pll1_refclk is optional and used for multi-protocol configurations requiring
+ separate reference clock for each protocol.
+ Same refclk is used for both PLL0 and PLL1 if no separate pll1_refclk is used.
+ Optional parent clock (phy_en_refclk) to enable a reference clock output feature
+ on some platforms to output either derived or received reference clock.
clock-names:
minItems: 1
items:
- const: refclk
- - const: phy_en_refclk
+ - enum: [ pll1_refclk, phy_en_refclk ]
reg:
minItems: 1