diff options
| author | Steven Lee <steven_lee@aspeedtech.com> | 2021-07-12 18:03:10 +0800 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-08-03 15:22:39 +0930 |
| commit | 09eccdc9ebb533874b7b04a8bcb6a621f55cacb2 (patch) | |
| tree | 5cf088eeada9dd53dc0dc86262a56bf570ac7a24 | |
| parent | 0ffbfcbc273ef3f290c835ad1781c4f9a58d5090 (diff) | |
ARM: dts: aspeed-g6: Add SGPIO node.
AST2600 supports 2 SGPIO master interfaces one with 128 pins another one
with 80 pins.
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Link: https://lore.kernel.org/r/20210712100317.23298-4-steven_lee@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g6.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index f96607b7b4e2..1b47be1704f8 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -377,6 +377,34 @@ #interrupt-cells = <2>; }; + sgpiom0: sgpiom@1e780500 { + #gpio-cells = <2>; + gpio-controller; + compatible = "aspeed,ast2600-sgpiom"; + reg = <0x1e780500 0x100>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_APB2>; + interrupt-controller; + bus-frequency = <12000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgpm1_default>; + status = "disabled"; + }; + + sgpiom1: sgpiom@1e780600 { + #gpio-cells = <2>; + gpio-controller; + compatible = "aspeed,ast2600-sgpiom"; + reg = <0x1e780600 0x100>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_APB2>; + interrupt-controller; + bus-frequency = <12000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgpm2_default>; + status = "disabled"; + }; + gpio1: gpio@1e780800 { #gpio-cells = <2>; gpio-controller; |