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authorAndrew Jeffery <andrew@aj.id.au>2016-12-20 17:45:35 +1030
committerLee Jones <lee.jones@linaro.org>2017-02-13 09:29:42 +0000
commit0f1747692ccc06fff9a5eb975b2a5cf92cec4030 (patch)
treecd21d3976a68f8f9812e4693b9edfc7e6d2683cd
parent73bee1d330a80943f1d0e13d32a739b80e44a470 (diff)
mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)
The Aspeed SoC Display Controller is presented as a syscon device to arbitrate access by display and pinmux drivers. Video pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the Display Controller. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
-rw-r--r--Documentation/devicetree/bindings/mfd/aspeed-gfx.txt17
1 files changed, 17 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt
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+* Device tree bindings for Aspeed SoC Display Controller (GFX)
+
+The Aspeed SoC Display Controller primarily does as its name suggests, but also
+participates in pinmux requests on the g5 SoCs. It is therefore considered a
+syscon device.
+
+Required properties:
+- compatible: "aspeed,ast2500-gfx", "syscon"
+- reg: contains offset/length value of the GFX memory
+ region.
+
+Example:
+
+gfx: display@1e6e6000 {
+ compatible = "aspeed,ast2500-gfx", "syscon";
+ reg = <0x1e6e6000 0x1000>;
+};