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authorSandeep Maheswaram <sanm@codeaurora.org>2020-02-12 16:51:28 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2020-02-25 20:52:55 -0800
commit129ff51d8edc4db7df821b36343f6a29580ccd26 (patch)
tree582fa61843aadcf4a1af319676a52ef8952aee3e
parent2fefa8a169747c5a1d280633521b01d920ce24a9 (diff)
arm64: dts: qcom: sc7180: Correct qmp phy reset entries
The phy reset entries were incorrect.so swapped them. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Link: https://lore.kernel.org/r/1581506488-26881-5-git-send-email-sanm@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sc7180.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 127be85bbfd7..7cebc1fad7e0 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1306,8 +1306,8 @@
<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
clock-names = "aux", "cfg_ahb", "ref", "com_aux";
- resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
- <&gcc GCC_USB3_PHY_PRIM_BCR>;
+ resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
+ <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
reset-names = "phy", "common";
usb_1_ssphy: phy@88e9200 {