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authorNeil Armstrong <neil.armstrong@linaro.org>2023-09-11 09:28:47 +0200
committerBjorn Andersson <andersson@kernel.org>2023-09-13 19:48:22 -0700
commit1cec289a3ced45b7f4a5e136acd79e401167c1ba (patch)
tree51f1a65f1b43e7ae90e6710584783d1281f32497
parent75cac7090298978c12c59dbca377d957f6f8a8bb (diff)
arm64: dts: qcom: sm8550-qrd: add bluetooth support
Enable the WCN7850 bluetooth over the UART14 link. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230911-topic-sm8550-upstream-bt-v4-2-a5a428c77418@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
-rw-r--r--arch/arm64/boot/dts/qcom/sm8550-qrd.dts43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index 2c09ce8aeafd..a17c9f4f713f 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -23,6 +23,7 @@
aliases {
serial0 = &uart7;
+ serial1 = &uart14;
};
wcd938x: audio-codec {
@@ -765,6 +766,10 @@
status = "okay";
};
+&qupv3_id_1 {
+ status = "okay";
+};
+
&remoteproc_adsp {
firmware-name = "qcom/sm8550/adsp.mbn",
"qcom/sm8550/adsp_dtb.mbn";
@@ -842,6 +847,21 @@
&tlmm {
gpio-reserved-ranges = <32 8>;
+ bt_default: bt-default-state {
+ bt-en-pins {
+ pins = "gpio81";
+ function = "gpio";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ sw-ctrl-pins {
+ pins = "gpio82";
+ function = "gpio";
+ bias-pull-down;
+ };
+ };
+
sde_dsi_active: sde-dsi-active-state {
pins = "gpio133";
function = "gpio";
@@ -883,6 +903,29 @@
status = "okay";
};
+&uart14 {
+ status = "okay";
+
+ bluetooth {
+ compatible = "qcom,wcn7850-bt";
+
+ vddio-supply = <&vreg_l15b_1p8>;
+ vddaon-supply = <&vreg_s4e_0p95>;
+ vdddig-supply = <&vreg_s4e_0p95>;
+ vddrfa0p8-supply = <&vreg_s4e_0p95>;
+ vddrfa1p2-supply = <&vreg_s4g_1p25>;
+ vddrfa1p9-supply = <&vreg_s6g_1p86>;
+
+ max-speed = <3200000>;
+
+ enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+ swctrl-gpios = <&tlmm 82 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-0 = <&bt_default>;
+ pinctrl-names = "default";
+ };
+};
+
&ufs_mem_hc {
reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
vcc-supply = <&vreg_l17b_2p5>;