diff options
| author | Nick Chan <towinchenmi@gmail.com> | 2025-02-20 20:21:43 +0800 |
|---|---|---|
| committer | Sven Peter <sven@svenpeter.dev> | 2025-04-13 12:46:30 +0200 |
| commit | 1ed7edcf5caa4332e33c4f43a1a36750ac61a652 (patch) | |
| tree | 632e470cb6afe50208e5b4c0b26a0980a9dd2334 | |
| parent | 0a52d413afc6236cd120286be8cb44714c36bc3c (diff) | |
arm64: dts: apple: t7000: Add CPU caches
Add information about CPU caches in Apple A8 SoC.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250220-caches-v1-2-2c7011097768@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
| -rw-r--r-- | arch/arm64/boot/dts/apple/t7000.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi index 85a34dc7bc01..52edc8d776a9 100644 --- a/arch/arm64/boot/dts/apple/t7000.dtsi +++ b/arch/arm64/boot/dts/apple/t7000.dtsi @@ -37,6 +37,9 @@ operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; }; cpu1: cpu@1 { @@ -47,6 +50,16 @@ operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; + next-level-cache = <&l2_cache>; + i-cache-size = <0x10000>; + d-cache-size = <0x10000>; + }; + + l2_cache: l2-cache { + compatible = "cache"; + cache-level = <2>; + cache-unified; + cache-size = <0x100000>; }; }; |