diff options
| author | Stanimir Varbanov <stanimir.varbanov@linaro.org> | 2022-10-05 11:37:30 +0300 |
|---|---|---|
| committer | Stanimir Varbanov <stanimir.varbanov@linaro.org> | 2022-10-25 10:32:02 +0300 |
| commit | 1eee6bb9b64bb3a914433bb7ec739d2e67cba5bd (patch) | |
| tree | 5f225def8a8daa7b48e0a52ed58d7079e2b45900 | |
| parent | a837e5161cfffbb3242cc0eb574f8bf65fd32640 (diff) | |
venus: firmware: Correct assertion of reset bit on remote processor
Currently we use read/write_relaxed in combination with mb() to assert
reset. This looks wrong because mb() after write_relaxed() will not
order correctly load-update-store sequence. Correct this by use
readl/writel which include memory barriers.
Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
| -rw-r--r-- | drivers/media/platform/qcom/venus/firmware.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index 71e43611d1cf..142d4c74017c 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -181,17 +181,15 @@ static int venus_shutdown_no_tz(struct venus_core *core) if (IS_V6(core)) { /* Assert the reset to XTSS */ - reg = readl_relaxed(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); + reg = readl(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); reg |= WRAPPER_XTSS_SW_RESET_BIT; - writel_relaxed(reg, wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); + writel(reg, wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET); } else { /* Assert the reset to ARM9 */ - reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET); + reg = readl(wrapper_base + WRAPPER_A9SS_SW_RESET); reg |= WRAPPER_A9SS_SW_RESET_BIT; - writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET); + writel(reg, wrapper_base + WRAPPER_A9SS_SW_RESET); } - /* Make sure reset is asserted before the mapping is removed */ - mb(); iommu = core->fw.iommu_domain; |