summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKrzysztof Kozlowski <krzk@kernel.org>2020-09-01 09:54:06 +0200
committerKrzysztof Kozlowski <krzk@kernel.org>2020-09-03 22:45:49 +0200
commit1fa7c1ac2365fd53f891789138932380bdb4488c (patch)
treede45bd0c337135eb402190e2e1b403b97b2f214c
parentdfe3a98aac4fd179cce67451bc0c3972bd8c6116 (diff)
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
Exynos5260 SoCs have ARM GIC 400. Correct the compatibles to match dtschema and fix the dtbs_check warnings like: arch/arm/boot/dts/exynos5260-xyref5260.dt.yaml: interrupt-controller@10481000: compatible: ['arm,cortex-a15-gic', 'arm,cortex-a9-gic'] is not valid under any of the given schemas Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200901075417.22481-3-krzk@kernel.org
-rw-r--r--arch/arm/boot/dts/exynos5260.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5260.dtsi b/arch/arm/boot/dts/exynos5260.dtsi
index 154df70128f3..9b45e052cca9 100644
--- a/arch/arm/boot/dts/exynos5260.dtsi
+++ b/arch/arm/boot/dts/exynos5260.dtsi
@@ -162,7 +162,7 @@
};
gic: interrupt-controller@10481000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
#size-cells = <0>;