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authorAnitha Chrisanthus <anitha.chrisanthus@intel.com>2020-11-04 17:15:26 -0800
committerSam Ravnborg <sam@ravnborg.org>2020-11-05 19:20:04 +0100
commit24c81b9e8e0b5d4652656d98bbf5d802c43e04ba (patch)
treefea615f715c5d17b695d03504e787e5ba65c07e9
parent5a76b1ed73b9e7d1a31fd996fb5626edeebc0d29 (diff)
dt-bindings: display: Intel KeemBay MSSCAM
This patch add bindings for Intel KeemBay MSSCAM syscon v2: fixed compatible (Sam R.) Signed-off-by: Anitha Chrisanthus <anitha.chrisanthus@intel.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/1604538931-26726-3-git-send-email-anitha.chrisanthus@intel.com
-rw-r--r--Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml43
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml
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index 000000000000..40caa6118809
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+++ b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Devicetree bindings for Intel Keem Bay MSSCAM
+
+maintainers:
+ - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
+ - Edmond J Dea <edmund.j.dea@intel.com>
+
+description: |
+ MSSCAM controls local clocks in the display subsystem namely LCD clocks and
+ MIPI DSI clocks. It also configures the interconnect between LCD and
+ MIPI DSI.
+
+properties:
+ compatible:
+ items:
+ - const: intel,keembay-msscam
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ reg-io-width:
+ const: 4
+
+required:
+ - compatible
+ - reg
+ - reg-io-width
+
+additionalProperties: false
+
+examples:
+ - |
+ msscam:msscam@20910000 {
+ compatible = "intel,keembay-msscam", "syscon";
+ reg = <0x20910000 0x30>;
+ reg-io-width = <4>;
+ };