diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-06-06 22:14:58 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2023-09-27 18:42:14 +0300 |
| commit | 25ea3411bd23c5f0043881e2c6710423eb411784 (patch) | |
| tree | 25e7d2b2c0cf76f593459d7fdfedd7d5f089bfdb | |
| parent | 5ae0da3fc78d3fdef278a22e874d6d5c305d1e03 (diff) | |
drm/i915/dsb: Use non-posted register writes for legacy LUT
The DSB has problems writing the legacy LUT. The two workarounds
I've discoverted are:
- write each entry twice back to back
- use non-posted writes
Let's use non-posted writes as that seems a bit more standard.
TODO: measure which is faster
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230606191504.18099-14-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_color.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 7da79ffeb77b..9f80228f96cb 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1329,9 +1329,20 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state, lut = blob->data; + /* + * DSB fails to correctly load the legacy LUT + * unless we either write each entry twice, + * or use non-posted writes + */ + if (crtc_state->dsb) + intel_dsb_nonpost_start(crtc_state->dsb); + for (i = 0; i < 256; i++) ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i), i9xx_lut_8(&lut[i])); + + if (crtc_state->dsb) + intel_dsb_nonpost_end(crtc_state->dsb); } static void ilk_load_lut_10(const struct intel_crtc_state *crtc_state, |