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authorBrian Norris <briannorris@chromium.org>2022-04-25 18:45:43 -0700
committerHeiko Stuebner <heiko@sntech.de>2022-04-30 15:06:14 +0200
commit2ca9e472c70f15de768ab200571e2f6634f66394 (patch)
treea426a8d77ecce1fc9419a668aebcd6d6f334a48d
parent9be1a9996ebd8da27cafc947e4578b2d419dc07e (diff)
soc: rockchip: power-domain: Replace dsb() with smb()
It's unclear if these are really needed at all, but seemingly their purpose is only as a write barrier. Use the general macro instead of the ARM-specific one. This driver is partially marked for COMPILE_TEST'ing, but it doesn't build under non-ARM architectures. Fix this up before *really* enabling it for COMPILE_TEST. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220426014545.628100-2-briannorris@chromium.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--drivers/soc/rockchip/pm_domains.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c
index 1b029e494274..cf16ff9b73b3 100644
--- a/drivers/soc/rockchip/pm_domains.c
+++ b/drivers/soc/rockchip/pm_domains.c
@@ -178,7 +178,7 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
regmap_update_bits(pmu->regmap, pmu->info->req_offset,
pd_info->req_mask, idle ? -1U : 0);
- dsb(sy);
+ wmb();
/* Wait util idle_ack = 1 */
target_ack = idle ? pd_info->ack_mask : 0;
@@ -285,7 +285,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
pd->info->pwr_mask, on ? 0 : -1U);
- dsb(sy);
+ wmb();
if (readx_poll_timeout_atomic(rockchip_pmu_domain_is_on, pd, is_on,
is_on == on, 0, 10000)) {