diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2021-05-11 09:44:58 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-05-12 01:04:23 +0200 |
| commit | 3babb604a8545a2551772c656cbebd6f40321861 (patch) | |
| tree | 292df00c0fa9cf2515a03acfb4f8110a8644c124 | |
| parent | 152b7a599674d27f26bec1a4fdbac63564d0fc93 (diff) | |
ARM: dts: ixp4xx: Create a proper expansion bus
The IXP4xx expansion bus is 24 bits (256 MB) that is memory
mapped between 0x50000000-0x5fffffff usin a set of chip
selects. The size of the windows is 16 or 32MB defined by
the boot loader system configuration at runtime.
Create a rudimentary simple-bus and move the flash memories
to the expansion bus, inside the SoC.
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts | 34 | ||||
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts | 32 | ||||
| -rw-r--r-- | arch/arm/boot/dts/intel-ixp4xx.dtsi | 13 |
3 files changed, 48 insertions, 31 deletions
diff --git a/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts b/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts index af9a2b0fe539..46dda0a895e7 100644 --- a/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts +++ b/arch/arm/boot/dts/intel-ixp42x-linksys-nslu2.dts @@ -90,24 +90,26 @@ timeout-ms = <5000>; }; - /* The first 16MB region on the expansion bus */ - flash@50000000 { - compatible = "intel,ixp4xx-flash", "cfi-flash"; - bank-width = <2>; - /* - * 8 MB of Flash in 0x20000 byte blocks - * mapped in at 0x50000000 - */ - reg = <0x50000000 0x800000>; - - partitions { - compatible = "redboot-fis"; - /* Eraseblock at 0x7e0000 */ - fis-index-block = <0x3f>; + soc { + bus@50000000 { + /* The first 16MB region at CS0 on the expansion bus */ + flash@0 { + compatible = "intel,ixp4xx-flash", "cfi-flash"; + bank-width = <2>; + /* + * 8 MB of Flash in 0x20000 byte blocks + * mapped in at CS0. + */ + reg = <0x00000000 0x800000>; + + partitions { + compatible = "redboot-fis"; + /* Eraseblock at 0x7e0000 */ + fis-index-block = <0x3f>; + }; + }; }; - }; - soc { pci@c0000000 { status = "ok"; diff --git a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts index 130a245a77e6..581ff18a2310 100644 --- a/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts +++ b/arch/arm/boot/dts/intel-ixp43x-gateworks-gw2358.dts @@ -76,23 +76,25 @@ }; }; - flash@50000000 { - compatible = "intel,ixp4xx-flash", "cfi-flash"; - bank-width = <2>; - /* - * 32 MB of Flash in 0x20000 byte blocks - * mapped in at 0x50000000 - */ - reg = <0x50000000 0x2000000>; - - partitions { - compatible = "redboot-fis"; - /* Eraseblock at 0x1fe0000 */ - fis-index-block = <0xff>; + soc { + bus@50000000 { + flash@0 { + compatible = "intel,ixp4xx-flash", "cfi-flash"; + bank-width = <2>; + /* + * 32 MB of Flash in 0x20000 byte blocks + * mapped in at CS0. + */ + reg = <0x00000000 0x2000000>; + + partitions { + compatible = "redboot-fis"; + /* Eraseblock at 0x1fe0000 */ + fis-index-block = <0xff>; + }; + }; }; - }; - soc { pci@c0000000 { status = "ok"; diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi index edfd81d9f3da..31371c65ad6d 100644 --- a/arch/arm/boot/dts/intel-ixp4xx.dtsi +++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi @@ -14,6 +14,19 @@ compatible = "simple-bus"; interrupt-parent = <&intcon>; + /* + * The IXP4xx expansion bus is a set of 16 or 32MB + * windows in the 256MB space from 0x50000000 to + * 0x5fffffff. + */ + bus@50000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x50000000 0x10000000>; + dma-ranges = <0x00000000 0x50000000 0x10000000>; + }; + qmgr: queue-manager@60000000 { compatible = "intel,ixp4xx-ahb-queue-manager"; reg = <0x60000000 0x4000>; |