diff options
| author | H Hartley Sweeten <hsweeten@visionengravers.com> | 2015-10-05 14:23:03 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-12 21:16:05 -0700 |
| commit | 3c56cdc5cc16dabd6ed0867977a6e374a3cc0da7 (patch) | |
| tree | 10e6a065d9b9b458d89f2f34b38303cb2fb02a70 | |
| parent | c06c3c953a9b89c1ffe70ba57762fbaafdcd6613 (diff) | |
staging: comedi: quatech_daqp_cs: tidy up aux register bitss
For aesthetics, and use the BIT macro to define the bits and
define some macros for the timer mode and d/a update bits.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/staging/comedi/drivers/quatech_daqp_cs.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/drivers/staging/comedi/drivers/quatech_daqp_cs.c b/drivers/staging/comedi/drivers/quatech_daqp_cs.c index c575104528cf..17b614c1f831 100644 --- a/drivers/staging/comedi/drivers/quatech_daqp_cs.c +++ b/drivers/staging/comedi/drivers/quatech_daqp_cs.c @@ -116,30 +116,30 @@ #define DAQP_TIMER_REG 0x0a /* and 0x0b (16-bit) */ #define DAQP_AUX_REG 0x0f - -#define DAQP_AUX_TRIGGER_TTL 0x00 -#define DAQP_AUX_TRIGGER_ANALOG 0x80 -#define DAQP_AUX_TRIGGER_PRETRIGGER 0x40 -#define DAQP_AUX_TIMER_INT_ENABLE 0x20 -#define DAQP_AUX_TIMER_RELOAD 0x00 -#define DAQP_AUX_TIMER_PAUSE 0x08 -#define DAQP_AUX_TIMER_GO 0x10 -#define DAQP_AUX_TIMER_GO_EXTERNAL 0x18 -#define DAQP_AUX_TIMER_EXTERNAL_SRC 0x04 -#define DAQP_AUX_TIMER_INTERNAL_SRC 0x00 -#define DAQP_AUX_DA_DIRECT 0x00 -#define DAQP_AUX_DA_OVERFLOW 0x01 -#define DAQP_AUX_DA_EXTERNAL 0x02 -#define DAQP_AUX_DA_PACER 0x03 - -#define DAQP_AUX_RUNNING 0x80 -#define DAQP_AUX_TRIGGERED 0x40 -#define DAQP_AUX_DA_BUFFER 0x20 -#define DAQP_AUX_TIMER_OVERFLOW 0x10 -#define DAQP_AUX_CONVERSION 0x08 -#define DAQP_AUX_DATA_LOST 0x04 -#define DAQP_AUX_FIFO_NEARFULL 0x02 -#define DAQP_AUX_FIFO_EMPTY 0x01 +/* Auxiliary Control register bits (write) */ +#define DAQP_AUX_EXT_ANALOG_TRIG BIT(7) +#define DAQP_AUX_PRETRIG BIT(6) +#define DAQP_AUX_TIMER_INT_ENA BIT(5) +#define DAQP_AUX_TIMER_MODE(x) (((x) & 0x3) << 3) +#define DAQP_AUX_TIMER_MODE_RELOAD DAQP_AUX_TIMER_MODE(0) +#define DAQP_AUX_TIMER_MODE_PAUSE DAQP_AUX_TIMER_MODE(1) +#define DAQP_AUX_TIMER_MODE_GO DAQP_AUX_TIMER_MODE(2) +#define DAQP_AUX_TIMER_MODE_EXT DAQP_AUX_TIMER_MODE(3) +#define DAQP_AUX_TIMER_CLK_SRC_EXT BIT(2) +#define DAQP_AUX_DA_UPDATE(x) (((x) & 0x3) << 0) +#define DAQP_AUX_DA_UPDATE_DIRECT DAQP_AUX_DA_UPDATE(0) +#define DAQP_AUX_DA_UPDATE_OVERFLOW DAQP_AUX_DA_UPDATE(1) +#define DAQP_AUX_DA_UPDATE_EXTERNAL DAQP_AUX_DA_UPDATE(2) +#define DAQP_AUX_DA_UPDATE_PACER DAQP_AUX_DA_UPDATE(3) +/* Auxiliary Status register bits (read) */ +#define DAQP_AUX_RUNNING BIT(7) +#define DAQP_AUX_TRIGGERED BIT(6) +#define DAQP_AUX_DA_BUFFER BIT(5) +#define DAQP_AUX_TIMER_OVERFLOW BIT(4) +#define DAQP_AUX_CONVERSION BIT(3) +#define DAQP_AUX_DATA_LOST BIT(2) +#define DAQP_AUX_FIFO_NEARFULL BIT(1) +#define DAQP_AUX_FIFO_EMPTY BIT(0) #define DAQP_FIFO_SIZE 4096 |