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authorDinh Nguyen <dinguyen@altera.com>2013-06-05 10:02:53 -0500
committerOlof Johansson <olof@lixom.net>2013-06-11 16:34:57 -0700
commit3d954cf1518f37edc0d5912d619bd0f644a27d7e (patch)
tree28d95bdbeee0160f8007689584afee337a1cc783
parent6cd26ecedfa258369c2cd725cb33b0477ab2819b (diff)
ARM: socfpga: dts: Add ethernet bindings for SOCFPGA
Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> CC: Arnd Bergmann <arnd@arndb.de> CC: Olof Johansson <olof@lixom.net> Cc: Pavel Machek <pavel@denx.de> CC: <linux@arm.linux.org.uk> v2: - Moved "disabled" status to dtsi file Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi18
-rw-r--r--arch/arm/boot/dts/socfpga_cyclone5.dts13
-rw-r--r--arch/arm/boot/dts/socfpga_vt.dts5
3 files changed, 34 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 16a6e13e08b4..02bb425719be 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -23,6 +23,7 @@
aliases {
ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
serial0 = &uart0;
serial1 = &uart1;
timer0 = &timer0;
@@ -238,13 +239,26 @@
};
};
- gmac0: stmmac@ff700000 {
+ gmac0: ethernet@ff700000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
reg = <0xff700000 0x2000>;
interrupts = <0 115 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
- phy-mode = "gmii";
+ clocks = <&emac0_clk>;
+ clock-names = "stmmaceth";
+ status = "disabled";
+ };
+
+ gmac1: ethernet@ff702000 {
+ compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
+ reg = <0xff702000 0x2000>;
+ interrupts = <0 120 4>;
+ interrupt-names = "macirq";
+ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+ clocks = <&emac1_clk>;
+ clock-names = "stmmaceth";
+ status = "disabled";
};
L2: l2-cache@fffef000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
index 2495958f1016..973999d2c697 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
@@ -32,6 +32,13 @@
reg = <0x0 0x40000000>; /* 1GB */
};
+ aliases {
+ /* this allow the ethaddr uboot environmnet variable contents
+ * to be added to the gmac1 device tree blob.
+ */
+ ethernet0 = &gmac1;
+ };
+
soc {
clkmgr@ffd04000 {
clocks {
@@ -41,6 +48,12 @@
};
};
+ ethernet@ff702000 {
+ phy-mode = "rgmii";
+ phy-addr = <0xffffffff>; /* probe for phy addr */
+ status = "okay";
+ };
+
timer0@ffc08000 {
clock-frequency = <100000000>;
};
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 0bf035d607f0..d1ec0cab2dee 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -41,6 +41,11 @@
};
};
+ ethernet@ff700000 {
+ phy-mode = "gmii";
+ status = "okay";
+ };
+
timer0@ffc08000 {
clock-frequency = <7000000>;
};