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authorAnup Patel <apatel@ventanamicro.com>2023-12-24 14:04:02 +0530
committerAnup Patel <anup@brainfault.org>2023-12-29 12:31:58 +0530
commit4c460eb369514d53383a7c6ba1aefbca4914c68b (patch)
treeb6456f89e52b94871fb3e94c4f12399cd29a23fc
parent3975525e554559117bbf569239c8b41f2c2fa5cf (diff)
RISC-V: KVM: Fix indentation in kvm_riscv_vcpu_set_reg_csr()
The indentation of "break" in kvm_riscv_vcpu_set_reg_csr() is inconsistent hence let us fix it. Fixes: c04913f2b54e ("RISCV: KVM: Add sstateen0 to ONE_REG") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202312190719.kBuYl6oJ-lkp@intel.com/ Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <anup@brainfault.org>
-rw-r--r--arch/riscv/kvm/vcpu_onereg.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c
index 11cdbf844291..c0bad1aed9f0 100644
--- a/arch/riscv/kvm/vcpu_onereg.c
+++ b/arch/riscv/kvm/vcpu_onereg.c
@@ -485,7 +485,7 @@ static int kvm_riscv_vcpu_set_reg_csr(struct kvm_vcpu *vcpu,
if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN))
rc = kvm_riscv_vcpu_smstateen_set_csr(vcpu, reg_num,
reg_val);
-break;
+ break;
default:
rc = -ENOENT;
break;