diff options
| author | Taniya Das <tdas@codeaurora.org> | 2019-12-27 12:08:33 +0530 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-01-04 23:25:01 -0800 |
| commit | 4cc62ebd0cd8a061331b4e013193621605f2e63b (patch) | |
| tree | 52cf9a36f066d119d8f9d1635ecd5cd1c8516398 | |
| parent | 35d26e9292e2e18e38a290e86ceba1842f94c522 (diff) | |
dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings
Add device tree bindings for video clock controller for
Qualcomm Technology Inc's SC7180 SoCs.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1577428714-17766-6-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/qcom,videocc-sc7180.h | 23 |
2 files changed, 24 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index fc3fcca61034..43cfc893a8d1 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -16,6 +16,7 @@ description: | properties: compatible: enum: + - qcom,sc7180-videocc - qcom,sdm845-videocc clocks: diff --git a/include/dt-bindings/clock/qcom,videocc-sc7180.h b/include/dt-bindings/clock/qcom,videocc-sc7180.h new file mode 100644 index 000000000000..7acaf1366b13 --- /dev/null +++ b/include/dt-bindings/clock/qcom,videocc-sc7180.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7180_H +#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SC7180_H + +/* VIDEO_CC clocks */ +#define VIDEO_PLL0 0 +#define VIDEO_CC_VCODEC0_AXI_CLK 1 +#define VIDEO_CC_VCODEC0_CORE_CLK 2 +#define VIDEO_CC_VENUS_AHB_CLK 3 +#define VIDEO_CC_VENUS_CLK_SRC 4 +#define VIDEO_CC_VENUS_CTL_AXI_CLK 5 +#define VIDEO_CC_VENUS_CTL_CORE_CLK 6 +#define VIDEO_CC_XO_CLK 7 + +/* VIDEO_CC GDSCRs */ +#define VENUS_GDSC 0 +#define VCODEC0_GDSC 1 + +#endif |