diff options
| author | Tero Kristo <t-kristo@ti.com> | 2020-04-30 11:36:40 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-05-14 12:55:31 -0700 |
| commit | 4f74251df0ceb3b9fbddf8b5c6aef31c0092b617 (patch) | |
| tree | 1efc08ed48ca4521d2755059550688e7361835da | |
| parent | c752424b55c944cfd9aaa580045227df57764c28 (diff) | |
clk: ti: dra7xx: fix RNG clock parent
RNG is sourced from L4 clock. Add info for this for proper parenting of
the clock.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Link: https://lkml.kernel.org/r/20200430083640.8621-4-t-kristo@ti.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | drivers/clk/ti/clk-7xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index 146d1d67c732..bf8fced40e42 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -644,7 +644,7 @@ static const struct omap_clkctrl_reg_data dra7_l4sec_clkctrl_regs[] __initconst { DRA7_L4SEC_AES1_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, { DRA7_L4SEC_AES2_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, { DRA7_L4SEC_DES_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, - { DRA7_L4SEC_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" }, + { DRA7_L4SEC_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l4_root_clk_div" }, { DRA7_L4SEC_SHAM_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" }, { 0 }, }; |