diff options
author | Anthony Koo <anthony.koo@amd.com> | 2023-09-03 11:22:04 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2023-09-20 16:24:09 -0400 |
commit | 5b7954272ae96070263dd900735e70982e02eb80 (patch) | |
tree | b76a596fb52c52ad9f0e48b230779efdf697c880 | |
parent | 8ce74b35630d60f4272da26270233768eb0d17d0 (diff) |
drm/amd/display: [FW Promotion] Release 0.0.183.0
- Add new IPS ALLOW masks
- Add new Replay power configuration options
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 6e705b219872..7ff507221285 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -596,6 +596,11 @@ enum dmub_ips_disable_type { DMUB_IPS_DISABLE_IPS2_Z10 = 3, }; +#define DMUB_IPS1_ALLOW_MASK 0x00000001 +#define DMUB_IPS2_ALLOW_MASK 0x00000002 +#define DMUB_IPS1_COMMIT_MASK 0x00000004 +#define DMUB_IPS2_COMMIT_MASK 0x00000008 + /** * union dmub_fw_boot_options - Boot option definitions for SCRATCH14 */ @@ -2786,6 +2791,10 @@ enum dmub_cmd_replay_type { * Set coasting vtotal. */ DMUB_CMD__REPLAY_SET_COASTING_VTOTAL = 3, + /** + * Set power opt and coasting vtotal. + */ + DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL = 4, }; /** @@ -2997,6 +3006,24 @@ struct dmub_rb_cmd_replay_set_coasting_vtotal { }; /** + * Definition of a DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL command. + */ +struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal { + /** + * Command header. + */ + struct dmub_cmd_header header; + /** + * Definition of a DMUB_CMD__SET_REPLAY_POWER_OPT command. + */ + struct dmub_cmd_replay_set_power_opt_data replay_set_power_opt_data; + /** + * Definition of a DMUB_CMD__REPLAY_SET_COASTING_VTOTAL command. + */ + struct dmub_cmd_replay_set_coasting_vtotal_data replay_set_coasting_vtotal_data; +}; + +/** * Definition of a DMUB_CMD__SET_PSR_POWER_OPT command. */ struct dmub_rb_cmd_psr_set_power_opt { @@ -4138,6 +4165,10 @@ union dmub_rb_cmd { * Definition of a DMUB_CMD__REPLAY_SET_COASTING_VTOTAL command. */ struct dmub_rb_cmd_replay_set_coasting_vtotal replay_set_coasting_vtotal; + /** + * Definition of a DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL command. + */ + struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal replay_set_power_opt_and_coasting_vtotal; }; /** |